From: Kiryl Shutsemau <kas@kernel.org>
To: Chao Gao <chao.gao@intel.com>
Cc: linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev,
kvm@vger.kernel.org, binbin.wu@linux.intel.com,
dan.j.williams@intel.com, dave.hansen@linux.intel.com,
ira.weiny@intel.com, kai.huang@intel.com, nik.borisov@suse.com,
paulmck@kernel.org, pbonzini@redhat.com,
reinette.chatre@intel.com, rick.p.edgecombe@intel.com,
sagis@google.com, seanjc@google.com,
tony.lindgren@linux.intel.com, vannapurve@google.com,
vishal.l.verma@intel.com, yilun.xu@linux.intel.com,
Thomas Gleixner <tglx@kernel.org>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH v5 08/22] x86/virt/seamldr: Allocate and populate a module update request
Date: Tue, 17 Mar 2026 10:59:43 +0000 [thread overview]
Message-ID: <abkvOYQIi2RvEYh8@thinkstation> (raw)
In-Reply-To: <20260315135920.354657-9-chao.gao@intel.com>
On Sun, Mar 15, 2026 at 06:58:28AM -0700, Chao Gao wrote:
> P-SEAMLDR uses the SEAMLDR_PARAMS structure to describe TDX module
> update requests. This structure contains physical addresses pointing to
> the module binary and its signature file (or sigstruct), along with an
> update scenario field.
>
> TDX modules are distributed in the tdx_blob format defined in
> blob_structure.txt from the "Intel TDX module Binaries Repository". A
> tdx_blob contains a header, sigstruct, and module binary. This is also the
> format supplied by the userspace to the kernel.
>
> Parse the tdx_blob format and populate a SEAMLDR_PARAMS structure
> accordingly. This structure will be passed to P-SEAMLDR to initiate the
> update.
>
> Note that the sigstruct_pa field in SEAMLDR_PARAMS has been extended to
> a 4-element array. The updated "SEAM Loader (SEAMLDR) Interface
> Specification" will be published separately. P-SEAMLDR compatibility
> validation (such as 4KB vs 16KB sigstruct support) is left to userspace,
> which must verify the P-SEAMLDR version meets the TDX module's minimum
> requirements.
>
> Signed-off-by: Chao Gao <chao.gao@intel.com>
> Reviewed-by: Tony Lindgren <tony.lindgren@linux.intel.com>
> Reviewed-by: Xu Yilun <yilun.xu@linux.intel.com>
> ---
> v5:
> - use a macro for tdx_blob version (0x100) [Yan]
> - don't do alignment checking for the binary/sigstruct [Rick]
> - drop blob's sigstruct and validation checking
> - set seamldr_params.version to 1 when necessary
> - drop the link to blob_structure.txt which might be unstable [Kai]
>
> v4:
> - Remove checksum verification as it is optional
> - Convert comments to is_vmalloc_addr() checks [Kai]
> - Explain size/alignment checks in alloc_seamldr_params() [Kai]
>
> v3:
> - Print tdx_blob version in hex [Binbin]
> - Drop redundant sigstruct alignment check [Yilun]
> - Note buffers passed from firmware upload infrastructure are
> vmalloc()'d above alloc_seamldr_params()
> ---
> arch/x86/virt/vmx/tdx/seamldr.c | 141 ++++++++++++++++++++++++++++++++
> 1 file changed, 141 insertions(+)
>
> diff --git a/arch/x86/virt/vmx/tdx/seamldr.c b/arch/x86/virt/vmx/tdx/seamldr.c
> index 7114326d7569..20cb6c797ce5 100644
> --- a/arch/x86/virt/vmx/tdx/seamldr.c
> +++ b/arch/x86/virt/vmx/tdx/seamldr.c
> @@ -7,6 +7,7 @@
> #define pr_fmt(fmt) "seamldr: " fmt
>
> #include <linux/mm.h>
> +#include <linux/slab.h>
> #include <linux/spinlock.h>
>
> #include <asm/seamldr.h>
> @@ -16,6 +17,33 @@
> /* P-SEAMLDR SEAMCALL leaf function */
> #define P_SEAMLDR_INFO 0x8000000000000000
>
> +#define SEAMLDR_MAX_NR_MODULE_4KB_PAGES 496
> +#define SEAMLDR_MAX_NR_SIG_4KB_PAGES 4
> +
> +/*
> + * The seamldr_params "scenario" field specifies the operation mode:
> + * 0: Install TDX module from scratch (not used by kernel)
> + * 1: Update existing TDX module to a compatible version
> + */
> +#define SEAMLDR_SCENARIO_UPDATE 1
> +
> +/*
> + * This is called the "SEAMLDR_PARAMS" data structure and is defined
> + * in "SEAM Loader (SEAMLDR) Interface Specification".
> + *
> + * It describes the TDX module that will be installed.
> + */
> +struct seamldr_params {
> + u32 version;
> + u32 scenario;
> + u64 sigstruct_pa[SEAMLDR_MAX_NR_SIG_4KB_PAGES];
> + u8 reserved[80];
> + u64 num_module_pages;
> + u64 mod_pages_pa_list[SEAMLDR_MAX_NR_MODULE_4KB_PAGES];
> +} __packed;
> +
> +static_assert(sizeof(struct seamldr_params) == 4096);
> +
> /*
> * Serialize P-SEAMLDR calls since the hardware only allows a single CPU to
> * interact with P-SEAMLDR simultaneously. Use raw version as the calls can
> @@ -41,6 +69,114 @@ int seamldr_get_info(struct seamldr_info *seamldr_info)
> }
> EXPORT_SYMBOL_FOR_MODULES(seamldr_get_info, "tdx-host");
>
> +static void free_seamldr_params(struct seamldr_params *params)
> +{
> + free_page((unsigned long)params);
> +}
> +
> +static struct seamldr_params *alloc_seamldr_params(const void *module, unsigned int module_size,
> + const void *sig, unsigned int sig_size)
> +{
> + struct seamldr_params *params;
> + const u8 *ptr;
> + int i;
> +
> + if (module_size > SEAMLDR_MAX_NR_MODULE_4KB_PAGES * SZ_4K)
> + return ERR_PTR(-EINVAL);
> +
> + if (sig_size > SEAMLDR_MAX_NR_SIG_4KB_PAGES * SZ_4K)
> + return ERR_PTR(-EINVAL);
> +
> + params = (struct seamldr_params *)get_zeroed_page(GFP_KERNEL);
> + if (!params)
> + return ERR_PTR(-ENOMEM);
> +
> + /*
> + * Only use version 1 when required (sigstruct > 4KB) for backward
> + * compatibility with P-SEAMLDR that lacks version 1 support.
> + */
> + if (sig_size > SZ_4K)
> + params->version = 1;
> + else
> + params->version = 0;
> +
> + params->scenario = SEAMLDR_SCENARIO_UPDATE;
> +
> + ptr = sig;
> + for (i = 0; i < sig_size / SZ_4K; i++) {
> + /*
> + * Don't assume @sig is page-aligned although it is 4KB-aligned.
> + * Always add the in-page offset to get the physical address.
> + */
I don't follow this. If @sig is 4k aligned in VA, it is page aligned.
If you want to handle case when @sig is not 4k aligned, than this is
broken. You need to bump ptr to the next 4k boundary, not by 4k.
> + params->sigstruct_pa[i] = (vmalloc_to_pfn(ptr) << PAGE_SHIFT) +
> + ((unsigned long)ptr & ~PAGE_MASK);
> + ptr += SZ_4K;
> + }
> +
> + params->num_module_pages = module_size / SZ_4K;
> +
> + ptr = module;
> + for (i = 0; i < params->num_module_pages; i++) {
> + params->mod_pages_pa_list[i] = (vmalloc_to_pfn(ptr) << PAGE_SHIFT) +
> + ((unsigned long)ptr & ~PAGE_MASK);
> + ptr += SZ_4K;
Same here.
> + }
> +
> + return params;
> +}
> +
> +/*
> + * Intel TDX module blob. Its format is defined at:
> + * https://github.com/intel/tdx-module-binaries/blob/main/blob_structure.txt
> + *
> + * Note this structure differs from the reference above: the two variable-length
> + * fields "@sigstruct" and "@module" are represented as a single "@data" field
> + * here and split programmatically using the offset_of_module value.
> + */
> +struct tdx_blob {
> + u16 version;
> + u16 checksum;
> + u32 offset_of_module;
> + u8 signature[8];
> + u32 length;
> + u32 reserved0;
> + u64 reserved1[509];
> + u8 data[];
> +} __packed;
> +
> +/* Supported versions of the tdx_blob */
> +#define TDX_BLOB_VERSION_1 0x100
> +
> +static struct seamldr_params *init_seamldr_params(const u8 *data, u32 size)
> +{
> + const struct tdx_blob *blob = (const void *)data;
> + int module_size, sig_size;
> + const void *sig, *module;
> +
> + /* Ensure the size is valid otherwise reading any field from the blob may overflow. */
> + if (size <= sizeof(struct tdx_blob) || size <= blob->offset_of_module)
> + return ERR_PTR(-EINVAL);
> +
> + if (blob->version != TDX_BLOB_VERSION_1) {
> + pr_err("unsupported blob version: %x\n", blob->version);
> + return ERR_PTR(-EINVAL);
> + }
> +
> + /* Split the blob into a sigstruct and a module. */
> + sig = blob->data;
> + sig_size = blob->offset_of_module - sizeof(struct tdx_blob);
> + module = data + blob->offset_of_module;
> + module_size = size - blob->offset_of_module;
> +
> + if (sig_size <= 0 || module_size <= 0 || blob->length != size)
> + return ERR_PTR(-EINVAL);
Maybe add a comment somewhere that block->offset_of_module is relative
to start of struct tdx_blob, not blob->data and blob->length includes
length of struct tdx_blob.
It can be either way and it is better to give a reader a hint.
> +
> + return alloc_seamldr_params(module, module_size, sig, sig_size);
> +}
> +
> +DEFINE_FREE(free_seamldr_params, struct seamldr_params *,
> + if (!IS_ERR_OR_NULL(_T)) free_seamldr_params(_T))
> +
> /**
> * seamldr_install_module - Install a new TDX module.
> * @data: Pointer to the TDX module update blob.
> @@ -50,6 +186,11 @@ EXPORT_SYMBOL_FOR_MODULES(seamldr_get_info, "tdx-host");
> */
> int seamldr_install_module(const u8 *data, u32 size)
> {
> + struct seamldr_params *params __free(free_seamldr_params) =
> + init_seamldr_params(data, size);
> + if (IS_ERR(params))
> + return PTR_ERR(params);
> +
> /* TODO: Update TDX module here */
> return 0;
> }
> --
> 2.47.3
>
--
Kiryl Shutsemau / Kirill A. Shutemov
next prev parent reply other threads:[~2026-03-17 10:59 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-15 13:58 [PATCH v5 00/22] Runtime TDX module update support Chao Gao
2026-03-15 13:58 ` [PATCH v5 01/22] x86/virt/tdx: Move low level SEAMCALL helpers out of <asm/tdx.h> Chao Gao
2026-03-16 12:41 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 02/22] coco/tdx-host: Introduce a "tdx_host" device Chao Gao
2026-03-16 12:48 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 03/22] coco/tdx-host: Expose TDX module version Chao Gao
2026-03-16 12:54 ` Kiryl Shutsemau
2026-03-18 21:37 ` Huang, Kai
2026-03-15 13:58 ` [PATCH v5 04/22] x86/virt/seamldr: Introduce a wrapper for P-SEAMLDR SEAMCALLs Chao Gao
2026-03-16 13:05 ` Kiryl Shutsemau
2026-03-17 0:43 ` Chao Gao
2026-03-17 9:59 ` Kiryl Shutsemau
2026-03-18 7:13 ` Xiaoyao Li
2026-03-18 9:34 ` Chao Gao
2026-03-19 3:02 ` Xiaoyao Li
2026-03-19 7:14 ` Chao Gao
2026-03-18 21:38 ` Huang, Kai
2026-03-15 13:58 ` [PATCH v5 05/22] x86/virt/seamldr: Retrieve P-SEAMLDR information Chao Gao
2026-03-16 13:12 ` Kiryl Shutsemau
2026-03-17 1:05 ` Chao Gao
2026-03-17 10:00 ` Kiryl Shutsemau
2026-03-18 7:53 ` Xiaoyao Li
2026-03-18 8:57 ` Chao Gao
2026-03-18 21:40 ` Huang, Kai
2026-03-15 13:58 ` [PATCH v5 06/22] coco/tdx-host: Expose P-SEAMLDR information via sysfs Chao Gao
2026-03-17 10:06 ` Kiryl Shutsemau
2026-03-17 15:34 ` Dave Hansen
2026-03-18 6:54 ` Chao Gao
2026-03-18 8:20 ` Xiaoyao Li
2026-03-18 9:10 ` Chao Gao
2026-03-18 9:28 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 07/22] coco/tdx-host: Implement firmware upload sysfs ABI for TDX module updates Chao Gao
2026-03-17 10:20 ` Kiryl Shutsemau
2026-03-18 8:28 ` Chao Gao
2026-03-18 21:45 ` Huang, Kai
2026-03-15 13:58 ` [PATCH v5 08/22] x86/virt/seamldr: Allocate and populate a module update request Chao Gao
2026-03-17 10:59 ` Kiryl Shutsemau [this message]
2026-03-18 8:50 ` Chao Gao
2026-03-18 10:58 ` Kiryl Shutsemau
2026-03-19 7:24 ` Chao Gao
2026-03-19 12:58 ` Kiryl Shutsemau
2026-03-18 21:36 ` Huang, Kai
2026-03-15 13:58 ` [PATCH v5 09/22] x86/virt/seamldr: Introduce skeleton for TDX module updates Chao Gao
2026-03-18 22:11 ` Huang, Kai
2026-03-19 13:15 ` Kiryl Shutsemau
2026-03-20 8:10 ` Chao Gao
2026-03-15 13:58 ` [PATCH v5 10/22] x86/virt/seamldr: Abort updates if errors occurred midway Chao Gao
2026-03-19 13:19 ` Kiryl Shutsemau
2026-03-20 8:12 ` Chao Gao
2026-03-15 13:58 ` [PATCH v5 11/22] x86/virt/seamldr: Shut down the current TDX module Chao Gao
2026-03-19 13:24 ` Kiryl Shutsemau
2026-03-20 8:21 ` Chao Gao
2026-03-23 1:33 ` Chao Gao
2026-03-15 13:58 ` [PATCH v5 12/22] x86/virt/tdx: Reset software states during TDX module shutdown Chao Gao
2026-03-16 9:06 ` Huang, Kai
2026-03-17 8:27 ` Chao Gao
2026-03-17 11:08 ` Huang, Kai
2026-03-15 13:58 ` [PATCH v5 13/22] x86/virt/seamldr: Install a new TDX module Chao Gao
2026-03-19 13:32 ` Kiryl Shutsemau
2026-03-23 2:14 ` Chao Gao
2026-03-15 13:58 ` [PATCH v5 14/22] x86/virt/seamldr: Do TDX per-CPU initialization after updates Chao Gao
2026-03-19 13:33 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 15/22] x86/virt/tdx: Restore TDX module state Chao Gao
2026-03-19 13:37 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 16/22] x86/virt/tdx: Update tdx_sysinfo and check features post-update Chao Gao
2026-03-19 13:43 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 17/22] x86/virt/tdx: Avoid updates during update-sensitive operations Chao Gao
2026-03-19 14:00 ` Kiryl Shutsemau
2026-03-20 8:00 ` Chao Gao
2026-03-15 13:58 ` [PATCH v5 18/22] coco/tdx-host: Don't expose P-SEAMLDR features on CPUs with erratum Chao Gao
2026-03-19 14:02 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 19/22] x86/virt/tdx: Enable TDX module runtime updates Chao Gao
2026-03-19 14:03 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 20/22] coco/tdx-host: Document TDX module update compatibility criteria Chao Gao
2026-03-19 14:04 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 21/22] x86/virt/tdx: Document TDX module update Chao Gao
2026-03-19 14:05 ` Kiryl Shutsemau
2026-03-15 13:58 ` [PATCH v5 22/22] x86/virt/seamldr: Log TDX module update failures Chao Gao
2026-03-19 14:06 ` Kiryl Shutsemau
2026-03-20 8:31 ` Chao Gao
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