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However, when those CPUs belong to SMT cores, > >> > >> Interesting, which kind of system has both SMT and SD_ASYM_CPUCAPACITY > >> ? I thought both were never set simultaneously and SD_ASYM_PACKING was > >> used for system involving SMT like x86 > > > > It's an NVIDIA platform (not publicly available yet), where the firmware > > exposes different CPU capacities and has SMT enabled, so both > > SD_ASYM_CPUCAPACITY and SMT are present. I'm not sure whether the final > > firmware release will keep this exact configuration (there's a good chance > > it will), so I'm targeting it to be prepared. > > > Andrea, > that makes me think, I've played with a nvidia grace available to me recently, > which sets slightly different CPPC highest_perf values (~2%) which automatically > will set SD_ASYM_CPUCAPACITY and run the entire capacity-aware scheduling > machinery for really almost negligible capacity differences, where it's > questionable how sensible that is. That looks like the same system that I've been working with. I agree that treating small CPPC differences as full asymmetry can be a bit overkill. I've been experimenting with flattening the capacities (to force the "regular" idle CPU selection policy), which performs better than the current asym-capacity CPU selection. However, adding the SMT awareness to the asym-capacity, seems to give a consistent +2-3% (same set of CPU-intensive benchmarks) compared to flatening alone, which is not bad. > I have an arm64 + CPPC implementation for asym-packing for this machine, maybe > we can reuse that for here too? Sure, that sounds interesting, if it's available somewhere I'd be happy to do some testing. Thanks, -Andrea