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[34.105.23.239]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b06e41974asm66911255ad.7.2026.03.19.12.04.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 12:04:41 -0700 (PDT) Date: Thu, 19 Mar 2026 19:04:37 +0000 From: David Matlack To: Rubin Du Cc: Alex Williamson , Shuah Khan , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v9 2/2] selftests/vfio: Add NVIDIA Falcon driver for DMA testing Message-ID: References: <20260317214239.124857-1-rubind@nvidia.com> <20260317214239.124857-3-rubind@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260317214239.124857-3-rubind@nvidia.com> On 2026-03-17 02:42 PM, Rubin Du wrote: > Add a new VFIO PCI driver for NVIDIA GPUs that enables DMA testing > via the Falcon (Fast Logic Controller) microcontrollers. This driver > extracts and adapts the DMA test functionality from the NVIDIA > gpu-admin-tools project and integrates it into the existing VFIO > selftest framework. > > The Falcon is a general-purpose microcontroller present on NVIDIA GPUs > that can perform DMA operations between system memory and device memory. > By leveraging Falcon DMA, this driver allows NVIDIA GPUs to be tested > alongside Intel IOAT and DSA devices using the same selftest infrastructure. > > Supported GPUs: > - Kepler: K520, GTX660, K4000, K80, GT635 > - Maxwell Gen1: GTX750, GTX745 > - Maxwell Gen2: M60 > - Pascal: P100, P4, P40 > - Volta: V100 > - Turing: T4 > - Ampere: A16, A100, A10 > - Ada: L4, L40S > - Hopper: H100 > > The PMU falcon on Kepler and Maxwell Gen1 GPUs uses legacy FBIF register > offsets and requires enabling via PMC_ENABLE with the HUB bit set. > > Limitations and tradeoffs: > > 1. Architecture support: > Blackwell and newer architectures may require additional work > due to firmware. > > 2. Synchronous DMA operations: > Each transfer blocks until completion because the reference > implementation does not expose command queuing - only one > DMA operation can be in flight at a time. Asynchronous DMA will be important for testing Live Update: https://lore.kernel.org/kvm/20260129212510.967611-23-dmatlack@google.com/ That is why I split memcpy_start() and memcpy_wait() from the beginning. Would it be possible to add support for it here even though it is not in the reference implementation? > > The driver is named 'nv_falcon' to reflect that it specifically controls > the Falcon microcontroller for DMA operations, rather than exposing > general GPU functionality. > > Reference implementation: > https://github.com/NVIDIA/gpu-admin-tools > > Signed-off-by: Rubin Du