Re: [PATCH 1/2] x86: Remove the prefetch() specific implementation on x86_64

[Youling Tang <youling.tang@linux.dev>]

Hi, Nikolay
On 30/05/2024 23:26, Nikolay Borisov wrote:
>
>
> On 29.05.24 г. 6:20 ч., Youling Tang wrote:
>> From: Youling Tang <tangyouling@kylinos.cn>
>>
>> After commit ab483570a13b ("x86 & generic: change to 
>> __builtin_prefetch()"),
>> x86_64 directly uses __builtin_prefetch() without the specific 
>> implementation
>> of prefetch(). Also, x86_64 use a generic definition until commit 
>> ae2e15eb3b6c
>> ("x86: unify prefetch operations"). So remove it.
>
>
> So this patch just ensures the x86-specific prefetch() implementation 
> is defined only for 32bit case, otherwise we have it defined for the 
> 64bit case as well but effectively it's not used since 
> ARCH_HAS_PREFETCH is not defined for 64bit, meaning in the 64bit case 
> prefetch() is still defined to __builtint_prefetch in 
> include/linux/prefetch.h.
>
>
> In essence this is a purely cosmetic cleanup , am I right?
Yes, when arch customization and __builtint_prefetch are implemented with
the same instructions, it looks like pure cleaning (without changing the
generated assembly).

Thanks,
Youling.
>
>
> I compiled a file that utilizes prefetch with and without your patch 
> and the generated assembly is identical.
>
>
> Reviewed-by: Nikolay Borisov <nik.borisov@suse.com>
>
>
>>
>> Signed-off-by: Youling Tang <tangyouling@kylinos.cn>
>> ---
>>   arch/x86/include/asm/processor.h | 7 ++++---
>>   1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/processor.h 
>> b/arch/x86/include/asm/processor.h
>> index cb4f6c513c48..44371bdcc59d 100644
>> --- a/arch/x86/include/asm/processor.h
>> +++ b/arch/x86/include/asm/processor.h
>> @@ -599,9 +599,6 @@ extern char            ignore_fpu_irq;
>>   #ifdef CONFIG_X86_32
>>   # define BASE_PREFETCH        ""
>>   # define ARCH_HAS_PREFETCH
>> -#else
>> -# define BASE_PREFETCH        "prefetcht0 %1"
>> -#endif
>>     /*
>>    * Prefetch instructions for Pentium III (+) and AMD Athlon (+)
>> @@ -616,6 +613,10 @@ static inline void prefetch(const void *x)
>>                 "m" (*(const char *)x));
>>   }
>>   +#else
>> +# define BASE_PREFETCH        "prefetcht0 %1"
>> +#endif
>> +
>>   /*
>>    * 3dnow prefetch to get an exclusive cache line.
>>    * Useful for spinlocks to avoid one state transition in the