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[35.205.13.209]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43b87f80976sm9851996f8f.4.2026.03.25.06.16.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Mar 2026 06:16:35 -0700 (PDT) Date: Wed, 25 Mar 2026 13:16:32 +0000 From: Sebastian Ene To: Fuad Tabba Cc: Vincent Donnefort , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, android-kvm@google.com, catalin.marinas@arm.com, joey.gouly@arm.com, mark.rutland@arm.com, maz@kernel.org, oupton@kernel.org, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com Subject: Re: [PATCH v2] KVM: arm64: Prevent the host from using an smc with imm16 != 0 Message-ID: References: <20260325113138.4171430-1-sebastianene@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Mar 25, 2026 at 12:16:17PM +0000, Fuad Tabba wrote: > On Wed, 25 Mar 2026 at 11:41, Sebastian Ene wrote: > > > > On Wed, Mar 25, 2026 at 11:35:18AM +0000, Vincent Donnefort wrote: > > > On Wed, Mar 25, 2026 at 11:31:38AM +0000, Sebastian Ene wrote: > > > > The ARM Service Calling Convention (SMCCC) specifies that the function > > > > identifier and parameters should be passed in registers, leaving the > > > > 16-bit immediate field of the SMC instruction un-handled. > > > > Currently, our pKVM handler ignores the immediate value, which could lead > > > > to non-compliant software relying on implementation-defined behavior. > > > > Enforce the host kernel running under pKVM to use an immediate value > > > > of 0 by decoding the ISS from the ESR_EL2 and return a not supported > > > > error code back to the caller. > > > > > > > > Signed-off-by: Sebastian Ene > > > > --- > > > > v1 -> v2: > > > > > > > > - Dropped injecting an UNDEF and return an error instead > > > > (SMCCC_RET_NOT_SUPPORTED) > > > > - Used the mask ESR_ELx_xVC_IMM_MASK instead of masking with U16_MAX > > > > - Updated the title of the commit message from: > > > > "[PATCH] KVM: arm64: Inject UNDEF when host is executing an > > > > smc with imm16 != 0 > > > > > > > --- > > > > arch/arm64/kvm/hyp/nvhe/hyp-main.c | 6 ++++++ > > > > 1 file changed, 6 insertions(+) > > > > > > > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > > > > index e7790097db93..4ffe30fd8707 100644 > > > > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > > > > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > > > > @@ -762,6 +762,12 @@ void handle_trap(struct kvm_cpu_context *host_ctxt) > > > > handle_host_hcall(host_ctxt); > > > > break; > > > > case ESR_ELx_EC_SMC64: > > > > + if (ESR_ELx_xVC_IMM_MASK & esr) { > > > > + cpu_reg(host_ctxt, 0) = SMCCC_RET_NOT_SUPPORTED; > > > > + kvm_skip_host_instr(); > > > > + break; > > > > + } > > > > + > > > > > > I wonder if it isn't better to move that into handle_host_smc() as this is part > > > of how we handle the SMC after all? (and it calls that kvm_skip_host_instr() > > > already) > > > > > > > I was thinking of doing that as well but I prefer this since we don't > > have to look again at the esr in the callee. > > This is a non-trivial amount of code to have in a switch. Can you > please put it in a helper? Hey Fuad, I will move it as part of the handle_host_smc(..) as suggested by other comment. > > Thanks, > /fuad > Thanks, Sebastian > > > > > > handle_host_smc(host_ctxt); > > > > break; > > > > case ESR_ELx_EC_IABT_LOW: > > > > -- > > > > 2.53.0.1018.g2bb0e51243-goog > > > >