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From: Niklas Cassel <cassel@kernel.org>
To: Koichiro Den <den@valinux.co.jp>
Cc: "Frank Li" <Frank.li@nxp.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Jon Mason" <jdmason@kudzu.us>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Allen Hubbe" <allenbh@gmail.com>,
	"Bhanu Seshu Kumar Valluri" <bhanuseshukumar@gmail.com>,
	"Marco Crivellari" <marco.crivellari@suse.com>,
	"Shin'ichiro Kawasaki" <shinichiro.kawasaki@wdc.com>,
	"Manikanta Maddireddy" <mmaddireddy@nvidia.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	ntb@lists.linux.dev, robin.murphy@arm.com
Subject: Re: [PATCH v10 7/7] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback
Date: Wed, 25 Mar 2026 17:56:36 +0100	[thread overview]
Message-ID: <acQTxJ75lq4tkszi@ryzen> (raw)
In-Reply-To: <ec62kljt36zh2autlth5jivdqlojbpdo2gbs43ayob7hobcpre@bpos6hqyuwkv>

On Wed, Mar 25, 2026 at 05:43:58PM +0900, Koichiro Den wrote:
> > > > ...
> > > > > +	 */
> > > > > +	if (doorbell->bar == NO_BAR) {
> > > > > +		phys_base = addr & PAGE_MASK;
> > > > > +		off = addr - phys_base;
> > > > > +		map_size = PAGE_ALIGN(off + sizeof(u32));
> > > > > +
> > > > > +		iova_base = dma_map_resource(epc->dev.parent, phys_base,
> > > > > +					     map_size, DMA_FROM_DEVICE, 0);
> > > > 
> > > > DB should write. Is it DMA_TO_DEVICE?
> > > 
> > > Thanks for reviewing.
> > > 
> > > The write is initiated by the peer (RC) and lands in this EP-side doorbell
> > > target, so from the EP side this is a DMA_FROM_DEVICE mapping.
> > 
> > I don't understand.
> > 
> > If the RC side does a PCI TLP write, the iATU on the EP side should translate
> > that to an AXI write, no?
> 
> Yes.
> 
> > 
> > If the target address (doorbell register in this case) is only mapped as a
> > DMA_FROM_DEVICE (read), I would have expected that AXI write to result in an
> > IOMMU fault.
> 
> My understanding is that the inbound MWr becomes a local write on the EP side.
> Here, the EP controller needs write permission to the doorbell target, so
> DMA_FROM_DEVICE is intentional.
> 
> As noted in the cover letter, IOMMU coverage was tested.
> 
> > 
> > Is the IOMMU really running in strict mode and not in passthrough mode on
> > your platform?
> > 
> > Do you get an IOMMU fault if you change this code to DMA_TO_DEVICE ?
> 
> Yes, changing it to DMA_TO_DEVICE triggers an IOMMU fault. I've confirmed this
> experimentally. This also indicates that it's not passthrough for this mapping
> on my setup.

I still think it sounds wrong as per:
https://docs.kernel.org/core-api/dma-api-howto.html#dma-direction

The transaction is a write from
PCIe bus -> PCIe controller iATU -> internal bus -> IOMMU -> PCIe controller
(the same controller as initiated the transaction).

But I guess I'm just an idiot :)


Would be interesting why this is not working like normal (when using buffers):
"For Networking drivers, it’s a rather simple affair.
For transmit packets, map/unmap them with the DMA_TO_DEVICE direction specifier.
For receive packets, just the opposite, map/unmap them with the DMA_FROM_DEVICE
direction specifier."

Pehaps it is because it is the same device that does a write, that ends up
writing to it a self? so source an destination is the same?


Kind regards,
Niklas

  reply	other threads:[~2026-03-25 16:56 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-02  7:14 [PATCH v10 0/7] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
2026-03-02  7:14 ` [PATCH v10 1/7] PCI: endpoint: Add auxiliary resource query API Koichiro Den
2026-03-21 14:17   ` Manivannan Sadhasivam
2026-03-23  1:34     ` Koichiro Den
2026-03-02  7:14 ` [PATCH v10 2/7] PCI: dwc: Record integrated eDMA register window Koichiro Den
2026-03-21 14:21   ` Manivannan Sadhasivam
2026-03-23  1:46     ` Koichiro Den
2026-03-24  8:06       ` Koichiro Den
2026-03-02  7:14 ` [PATCH v10 3/7] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API Koichiro Den
2026-03-23 18:36   ` Frank Li
2026-03-24  8:45     ` Koichiro Den
2026-03-02  7:14 ` [PATCH v10 4/7] PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new backends Koichiro Den
2026-03-02  7:14 ` [PATCH v10 5/7] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags Koichiro Den
2026-03-23 18:39   ` Frank Li
2026-03-02  7:14 ` [PATCH v10 6/7] PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets Koichiro Den
2026-03-23 18:41   ` Frank Li
2026-03-02  7:14 ` [PATCH v10 7/7] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
2026-03-02 10:07   ` Niklas Cassel
2026-03-23 18:48   ` Frank Li
2026-03-24  1:40     ` Koichiro Den
2026-03-25  7:06       ` Niklas Cassel
2026-03-25  8:43         ` Koichiro Den
2026-03-25 16:56           ` Niklas Cassel [this message]
2026-03-26  8:49             ` Koichiro Den
2026-03-26  9:59               ` Niklas Cassel
2026-03-26 10:25                 ` Niklas Cassel
2026-03-26 12:12                   ` Robin Murphy
2026-03-26 14:38                     ` Koichiro Den

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