From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C2F6923D2AB for ; Sun, 29 Mar 2026 05:35:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774762539; cv=none; b=gIh1/XNfvFL6XrxMGoatCjAWNZDASD/mc8DkqRkTvcpU9RZyBID6uQ4B8dZKEmz2ZhkOw+HIKq/se3sYx5afL66uOy8cKrrK+JBKZjx1DIrPfWsreK9aC3W+/Xeo1d4XzxlWHiwSSVFXlNd5bJEiv5w9G/xYJklBByB3jxaND4Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774762539; c=relaxed/simple; bh=vY+O6RalbUbALe8t4Gga++nvo+Whd8+y/ClNSeyKSjw=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=J+UJeF4wVGkHxSBWMUQyq/Zjjh0YLonQW2J6sZPB9aCxI4rSNyDofY4gBk/uDFAlWLeDaqutQfJM0ZZWJW0OLaUwzP+r2Py98PugNFfMPsbBf110XDsanYoLI07ul5eGXYKDw6vfgP5J8dyFZB7runDvSeUG3tNl3P91C7y4brk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KHMDuRXy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KHMDuRXy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00A54C116C6; Sun, 29 Mar 2026 05:35:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774762539; bh=vY+O6RalbUbALe8t4Gga++nvo+Whd8+y/ClNSeyKSjw=; h=Date:From:To:Cc:Subject:From; b=KHMDuRXy5SAj6QC9Iqk/7dBDULvMEbck1KLme+LOZZ4fRTcN6MRsHUeHXY91b4m9A hUFD8vVpX51FcbDLiPDd4rVM3ktILDzieXfUZ6whpWfLCcA91nD5eJmXnVG20L94BW cz9WU3cx1sTqLabCamdSrQuE9w1Lcs+MW7wTcXiKktonqjw0a1gVem5Di3mXJyHxOw quaky2mMFH4FGHHr8BU8dSUnZyz7UxgBRavZ8o/Kk3caPpfztT41GN60vQN7ju49cr q+in/p1KkfrYK4ACGw86nzFXLMlIiwZ9PwC4JFH4uiGp/QB0nyBOADmNutemsXw602 UoDFIadqS8mNA== Date: Sun, 29 Mar 2026 07:35:35 +0200 From: Ingo Molnar To: Linus Torvalds Cc: linux-kernel@vger.kernel.org, the arch/x86 maintainers , Peter Zijlstra , "H. Peter Anvin" Subject: [GIT PULL] x86 fixes Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Linus, Please pull the latest x86/urgent Git tree from: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-2026-03-29 for you to fetch changes up to a3e93cac25316aad03bf561e3c205f4ca0b8f452: Miscellaneous x86 fixes: - Fix an early boot crash in AMD SEV-SNP guests, caused by incorrect FSGSBASE init ordering. (Nikunj A Dadhania) - Remove X86_CR4_FRED from the CR4 pinned bits mask, to fix a race window during the bootup of SEV-{ES,SNP} or TDX guests, which can crash them if they trigger exceptions in that window. (Borislav Petkov) - Fix early boot failures on SEV-ES/SNP guests, due to incorrect early GHCB access. (Nikunj A Dadhania) - Add clarifying comment to the CRn pinning logic, to avoid future confusion & bugs. (Peter Zijlstra) Thanks, Ingo ------------------> Borislav Petkov (AMD) (1): x86/cpu: Remove X86_CR4_FRED from the CR4 pinned bits mask Nikunj A Dadhania (2): x86/cpu: Enable FSGSBASE early in cpu_init_exception_handling() x86/fred: Fix early boot failures on SEV-ES/SNP guests Peter Zijlstra (1): x86/cpu: Add comment clarifying CRn pinning arch/x86/coco/sev/noinstr.c | 6 ++++++ arch/x86/entry/entry_fred.c | 14 ++++++++++++++ arch/x86/kernel/cpu/common.c | 33 ++++++++++++++++++++++++++------- 3 files changed, 46 insertions(+), 7 deletions(-)