From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 683F03368B9; Mon, 30 Mar 2026 17:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774893057; cv=none; b=u68gL0WZqdR+x+kENQG7fRrmtSernbp8BYZZjWbu3CejsVdaUDiFzqT0W5wy/lcW/kbflxvEvAuPesF0xcQtdEjZOYU++Q5uyUs1ls2az08fIROqRS31dGse/eGpe4t+AASXgEKihDJp5LAJMSvFC4Ee1kYD50hbm+DOdIe8h9M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774893057; c=relaxed/simple; bh=Q9spMYTFq+Dexr7WoH95SGr4xl91pz3EmMkNzE9Au14=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=o+Dma2QHCN4CLMFUVmF0kOV1XKo6sv7NjkKIdVjo2Iy2GYna1SrlA9OaRjr6xG8lxyte1Ar0GpRgsKg2u818dOSASLHgQBDli4wWDhucSUzvh8ngiAXJOUNqxcawRL4M923uxFq1kk46ohCkhhq5nycNQZja2CpYT/Kv20i7bOk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GusvJ86L; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GusvJ86L" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 78E6CC4CEF7; Mon, 30 Mar 2026 17:50:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774893056; bh=Q9spMYTFq+Dexr7WoH95SGr4xl91pz3EmMkNzE9Au14=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=GusvJ86LVvM8M1LBOnDdFpvNBREKpKTRVkuf4BlxLpIwkJ+6vsvHqHFMSXWgo5OZj fV17YtxCgW0g5aYj/GQNEHlpCVGWZcSQUyVvqjNcpVqOeAWb8dG0Uj9pTl3AwQqepZ aGwveQBzfWFZUpAM5USstEJLGW2F3ANucCDriGcTB02yqPfOaMn4yfb+Qz7TVbGZfK O0XcJh6KiyqP+t6QtQu68wjtVnOGm6aZF1bgAM0HesuLXH7/0FPQLb/1PWe66v24ol joLTEhHUvOOje1MUMiBj1ZWLbIhT19FGzTVyyAH10KDFQh7X20MF5ebDrUGlLF5ufR CzrJ358YAx4qg== Date: Mon, 30 Mar 2026 12:50:51 -0500 From: Bjorn Andersson To: Dmitry Baryshkov Cc: Konrad Dybcio , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Akhil P Oommen , Vikash Garodia , Dikshita Agarwal , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, Wangao Wang Subject: Re: [PATCH v4 2/9] soc: qcom: ubwc: add helpers to get programmable values Message-ID: References: <20260125-iris-ubwc-v4-0-1ff30644ac81@oss.qualcomm.com> <20260125-iris-ubwc-v4-2-1ff30644ac81@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260125-iris-ubwc-v4-2-1ff30644ac81@oss.qualcomm.com> On Sun, Jan 25, 2026 at 01:30:04PM +0200, Dmitry Baryshkov wrote: > Currently the database stores macrotile_mode in the data. However it > can be derived from the rest of the data: it should be used for UBWC > encoding >= 3.0 except for several corner cases (SM8150 and SC8180X). > > The ubwc_bank_spread field seems to be based on the impreside data we > had for the MDSS and DPU programming. In some cases UBWC engine inside > the display controller doesn't need to program it, although bank spread > is to be enabled. > > Bank swizzle is also currently stored as is, but it is almost standard > (banks 1-3 for UBWC 1.0 and 2-3 for other versions), the only exception > being Lemans (it uses only bank 3). > > Add helpers returning values from the config for now. They will be > rewritten later, in a separate series, but having the helper now > simplifies refacroring the code later. > > Tested-by: Wangao Wang > Signed-off-by: Dmitry Baryshkov Please find patch 1 and 2 in an immutable branch at: https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git 20260125-iris-ubwc-v4-1-1ff30644ac81@oss.qualcomm.com Regards, Bjorn > --- > include/linux/soc/qcom/ubwc.h | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h > index 5bdeca18d54d..f5d0e2341261 100644 > --- a/include/linux/soc/qcom/ubwc.h > +++ b/include/linux/soc/qcom/ubwc.h > @@ -84,4 +84,19 @@ static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data > cfg->ubwc_dec_version == UBWC_3_0); > } > > +static inline bool qcom_ubwc_macrotile_mode(const struct qcom_ubwc_cfg_data *cfg) > +{ > + return cfg->macrotile_mode; > +} > + > +static inline bool qcom_ubwc_bank_spread(const struct qcom_ubwc_cfg_data *cfg) > +{ > + return cfg->ubwc_bank_spread; > +} > + > +static inline u32 qcom_ubwc_swizzle(const struct qcom_ubwc_cfg_data *cfg) > +{ > + return cfg->ubwc_swizzle; > +} > + > #endif /* __QCOM_UBWC_H__ */ > > -- > 2.47.3 >