From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f201.google.com (mail-pl1-f201.google.com [209.85.214.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DDE53D6693 for ; Fri, 3 Apr 2026 19:36:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775244981; cv=none; b=ikSZD9aItM1YyaFaIVHtVm3VtcsWVs/BL62CwgQ5LKM9uyxcaALUaIrmSyLbfbUAOX43pEAolVVp4+NBBIQCWvOpaxgvbT80zn/bVant82GO3MvrNguECQA6QsSRsbvl/qTYr5EYQayODhnI3EcND6QQzfwpPuxGks8UL7qJ5ZI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775244981; c=relaxed/simple; bh=PHL9RYVszE45KiwMDiNqTuG9trf+5bM3AhgAKWeOkww=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=OMrgH9LTLw8dgS97ECVJ6XMK/9g3TnbOHKqHytK/cI8GylJMN5f97o4qgwCcjM408TidNFkOrJoRax8S8fP+3eaDHQJetmPPVFtFmbW9OgpZozf1ufTjkJcGcAy1ipFpKq6HNAwc1oeqHHsJuBWHPIzJVXiayNuHLFFLQODrrKc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=h+B5GDMc; arc=none smtp.client-ip=209.85.214.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="h+B5GDMc" Received: by mail-pl1-f201.google.com with SMTP id d9443c01a7336-2b24308165dso56599055ad.1 for ; Fri, 03 Apr 2026 12:36:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1775244980; x=1775849780; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=TZL1WyPpfHlEX2oWiroXVCAkOH5+r6sAjq910cBf36s=; b=h+B5GDMc6l5jWMhbi7fQ1grzSebr8Ip2plpGdvzhf48bu5vVoGnyw/4TnhUeea2KEG ADr6rSOhkIQOmes55bqvjxU5wF/N8QZyE/QTpfJH7CZD+jNvZOQ+3NRXNE4/6b+XJaH8 ScTUOwYTVJD5mpF0oMhO6JZt4QdGIPRD18eFWKfILY72G4wk17MqZJfthA/dMpJAkMfV vuuuoC+4Gw5ICtvQ+RYlW0NNBBogJZ/FGELg3UjVhHDw0aZha+S1MmuTN+xL4MEFs4YS eXIOGBlXZIrQBkaDwhOTsrgZgw9LNCsAVJ84mOpxF7Tz605aXVkOUF7oUHU+xH4WB6Mx rGNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775244980; x=1775849780; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=TZL1WyPpfHlEX2oWiroXVCAkOH5+r6sAjq910cBf36s=; b=XzoPLComNBwtKQJbL2UlTDXBT8+Cg8w9TecWUja5vra8Hebn7F8TWGx3rRMdaJPxS7 HASFmpOKG/Dgm7fsSqOEG8U8yasMFIRU53DunOFcwsqU9E1ZfNs3hk30f30p4UZZV2dj WCgP1gbS3l9DabmboPceGxzDyp5V1cOUPndjIfDBkLZ4IIv0sjvfSPP8ZpqtLZvBcIfR DvF23HADY9pp9WgIu9SnRSjqajTk6XZ4N4LLg7QKkU8uLjUJFtQ0d80lYgVbqXZeiqLB kUj0Mjr35mCAYDdxOeb1XoGoQ2eFfKkYnhJ2RcBd4rktMrEwS2zXNVhh/0Vlq6+Gee6y 0RDQ== X-Forwarded-Encrypted: i=1; AJvYcCUOei8HHM4eEjxk+8ZuWYI4zCUQ/BI16bCpfjpBOorAQmtCcb4dKThXIuvDSaLg073U9S4kyCZPlMEOtaA=@vger.kernel.org X-Gm-Message-State: AOJu0YwG6mUxoIkcx5FREhBGDCyHqnnbgUYd8SEMEGPVTM2YDjeXUO0r InKwOJ75esa6EA5ij/B47vHkm+NPb25799nrQ/StDM6ILZrrv5aKz5iQTUN1AhhxIE70UWKBmlI +mD+xfQ== X-Received: from plnx20.prod.google.com ([2002:a17:902:8214:b0:2b0:b075:e57d]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:1984:b0:2b0:72c7:3ed8 with SMTP id d9443c01a7336-2b281801499mr41415165ad.25.1775244979606; Fri, 03 Apr 2026 12:36:19 -0700 (PDT) Date: Fri, 3 Apr 2026 12:36:18 -0700 In-Reply-To: <20260403154915.2285621-1-david.kaplan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260403154915.2285621-1-david.kaplan@amd.com> Message-ID: Subject: Re: [PATCH] x86/fpu: Disable shstk if no CET_USER state From: Sean Christopherson To: David Kaplan Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" On Fri, Apr 03, 2026, David Kaplan wrote: > Some hypervisors (including QEMU 10.1.5) may report CET_SS support in > CPUID Fn7 but fail to report that CET_USER state is supported in > supervisor xstate. Linux relies on XSAVES/XRSTORS to swap CET state > during context switch and assumes it is supported when CET_SS is > present. > > As a result, if a user process is run with shadow stacks enabled and > then is switched away from, the system may crash because the new process > may be incorrectly run with shadow stacks enabled. > > Detect this broken configuration and disable user shadow stacks unless > CET_USER is supported in xstate. It's not actually broken though, is it? Just "odd". AFAICT, neither the SDM nor the APM _requires_ CET_{U,S} to be supported in XSS if shadow stacks are suppported. > Signed-off-by: David Kaplan > --- > arch/x86/kernel/fpu/xstate.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c > index 76153dfb58c9..188323442b4d 100644 > --- a/arch/x86/kernel/fpu/xstate.c > +++ b/arch/x86/kernel/fpu/xstate.c > @@ -855,6 +855,17 @@ void __init fpu__init_system_xstate(unsigned int legacy_size) > goto out_disable; > } > > + if (boot_cpu_has(X86_FEATURE_USER_SHSTK) && > + !(fpu_kernel_cfg.max_features & XFEATURE_MASK_CET_USER)) { > + /* > + * The kernel relies on XSAVES/XRSTORS to context switch shadow > + * stack state. If this isn't present, disable user shadow > + * stacks. > + */ > + pr_err("x86/fpu: CET_USER not supported in xstate when CET is supported. Disabling shadow stacks.\n"); > + setup_clear_cpu_cap(X86_FEATURE_USER_SHSTK); Doesn't this apply to IBT as well? This code is also misplaced, as it needs to live after at least this code: if (!cpu_feature_enabled(X86_FEATURE_XSAVES)) fpu_kernel_cfg.max_features &= XFEATURE_MASK_USER_SUPPORTED; else fpu_kernel_cfg.max_features &= XFEATURE_MASK_USER_SUPPORTED | XFEATURE_MASK_SUPERVISOR_SUPPORTED; and should probably play nice with the "out_disable" path too. All in all, setup_cet() seems like a much better fit, but unfortunately that runs before fpu__init_system() :-( > + } > + > fpu_kernel_cfg.independent_features = fpu_kernel_cfg.max_features & > XFEATURE_MASK_INDEPENDENT; > > > base-commit: d998c62f267213aeb815cf654908608eb7c00db2 > -- > 2.53.0 >