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From: Roland Dreier <rdreier@cisco.com>
To: "Zhao\, Yu" <yu.zhao@intel.com>
Cc: "linux-pci\@vger.kernel.org" <linux-pci@vger.kernel.org>,
       Jesse Barnes <jbarnes@virtuousgeek.org>,
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Subject: Re: [PATCH 4/6 v3] PCI: support SR-IOV capability
References: <D8078B8B3B09934AA9F8F2D5FB3F28CE088751B5F4@pdsmsx502.ccr.corp.intel.com>
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Date: Tue, 30 Sep 2008 15:40:15 -0700
In-Reply-To: <D8078B8B3B09934AA9F8F2D5FB3F28CE088751B5F4@pdsmsx502.ccr.corp.intel.com>
	(Yu Zhao's message of "Sat, 27 Sep 2008 16:28:15 +0800")
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 > +       ctrl = pci_ari_enabled(dev) ? PCI_IOV_CTRL_ARI : 0;
 > +       pci_write_config_word(dev, pos + PCI_IOV_CTRL, ctrl);
 > +       ssleep(1);

You seem to sleep for 1 second wherever you write the IOV_CTRL
register.  Why is this?  Is this specified by PCI, or is it coming from
somewhere else?

 - R.