Re: SCSI breakage on non-cache coherent architectures

James Bottomley
2007-11-20T21:10:33Z

On Tue, 2007-11-20 at 12:05 -0800, Roland Dreier wrote:
> > Actually, we already established on IRC that the lasi700 driver doesn't
> > need this, principally because the parisc architecture doesn't do an
> > invalidate for DMA_FROM_DEVICE but a flush and invalidate
> > (architecturally, if you read our manuals, even pdc is entitled to write
> > back dirty lines, so it's not clear there's actually an invalidate
> > instruction we can use). This is also one possible temporary fix for
> > the other architectures if we can't get a different method to work
> > nicely.
>
> I think doing a writeback and invalidate is a very fragile way to deal
> with DMA into the middle of a data structure. It may work OK for now,
> but you have to make sure forever into the future that no codepath
> anywhere else ever touches the cacheline that you're DMAing into while
> the DMA is pending. It just leaves a hidden trap that is too easy to
> step on, because the architectures that get pretty much all testing
> all have cache-coherent DMA.
>
> Reviving my ancient __dma_buffer patch seems far preferable to me.

We're talking about trying to fix this for 2.4; which is already at
-rc3 ... Is an entire arch change for dma alignment really a merge
candidate at this stage?

James