Re: SCSI breakage on non-cache coherent architectures

David Miller
2007-11-19T22:31:25Z

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Tue, 20 Nov 2007 06:51:14 +1100

> On Mon, 2007-11-19 at 00:38 -0800, David Miller wrote:
> > From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > Date: Mon, 19 Nov 2007 16:35:23 +1100
> >
> > You could make a ____dma_cacheline_aligned and use that.
> > It seems pretty reasonable.
>
> I was thinking about that. What archs would need it ? arm, mips, what
> else ?

The sparc32 port would need it too.