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* [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-21  3:32 Luke Yang
  2006-09-21  9:59 ` Luke Yang
                   ` (3 more replies)
  0 siblings, 4 replies; 53+ messages in thread
From: Luke Yang @ 2006-09-21  3:32 UTC (permalink / raw)
  To: linux-kernel, Andrew Morton

Hi everyone,

  This is the blackfin architecture for 2.6.18, again. As we promised,
we fixed some issues in our old patches as following.

- use serial core in that driver

- Fix up that ioctl so it a) doesn't sleep in spinlock and b) compiles

- Use generic IRQ framework

- Review all the volatiles, consolidate them in some helper-in-header-file.

  And we also fixed a lot of other issues and ported it to 2.6.18 now.
As usual, this architecture patch is too big so I just give a link
here. Please review it and give you comments, we really appreciate.

http://blackfin.uclinux.org/frs/download.php/1010/blackfin_arch_2.6.18.patch

Signed-off-by:  Luke Yang <luke.adi@gmail.com>

 arch/blackfin/Kconfig                              |  840 +++++++
 arch/blackfin/Kconfig.ide                          |   88
 arch/blackfin/Makefile                             |   78
 arch/blackfin/defconfig                            | 1088 +++++++++
 arch/blackfin/kernel/Makefile                      |   11
 arch/blackfin/kernel/asm-offsets.c                 |  138 +
 arch/blackfin/kernel/bfin_dma_5xx.c                |  749 ++++++
 arch/blackfin/kernel/bfin_ksyms.c                  |  114
 arch/blackfin/kernel/dma-mapping.c                 |  174 +
 arch/blackfin/kernel/dualcore_test.c               |   51
 arch/blackfin/kernel/entry.S                       |   99
 arch/blackfin/kernel/init_task.c                   |   63
 arch/blackfin/kernel/irqchip.c                     |  150 +
 arch/blackfin/kernel/module.c                      |  469 +++
 arch/blackfin/kernel/process.c                     |  346 ++
 arch/blackfin/kernel/ptrace.c                      |  431 +++
 arch/blackfin/kernel/setup.c                       |  941 +++++++
 arch/blackfin/kernel/signal.c                      |  715 +++++
 arch/blackfin/kernel/sys_bfin.c                    |  254 ++
 arch/blackfin/kernel/time.c                        |  336 ++
 arch/blackfin/kernel/traps.c                       |  640 +++++
 arch/blackfin/kernel/vmlinux.lds.S                 |  225 +
 arch/blackfin/lib/Makefile                         |    9
 arch/blackfin/lib/ashldi3.c                        |   56
 arch/blackfin/lib/ashrdi3.c                        |   57
 arch/blackfin/lib/checksum.c                       |  139 +
 arch/blackfin/lib/divsi3.S                         |  156 +
 arch/blackfin/lib/gcclib.h                         |   49
 arch/blackfin/lib/ins.S                            |   78
 arch/blackfin/lib/lshrdi3.c                        |   70
 arch/blackfin/lib/memchr.S                         |   64
 arch/blackfin/lib/memcmp.S                         |  108
 arch/blackfin/lib/memcpy.S                         |  128 +
 arch/blackfin/lib/memmove.S                        |  102
 arch/blackfin/lib/memset.S                         |  103
 arch/blackfin/lib/modsi3.S                         |   74
 arch/blackfin/lib/muldi3.c                         |   97
 arch/blackfin/lib/outs.S                           |   63
 arch/blackfin/lib/udivsi3.S                        |  157 +
 arch/blackfin/lib/umodsi3.S                        |   63
 arch/blackfin/mach-bf533/Kconfig                   |  103
 arch/blackfin/mach-bf533/Makefile                  |   10
 arch/blackfin/mach-bf533/boards/Makefile           |    8
 arch/blackfin/mach-bf533/boards/cm_bf533.c         |  236 +
 arch/blackfin/mach-bf533/boards/ezkit.c            |  213 +
 arch/blackfin/mach-bf533/boards/generic_board.c    |   78
 arch/blackfin/mach-bf533/boards/stamp.c            |  265 ++
 arch/blackfin/mach-bf533/cpu.c                     |  169 +
 arch/blackfin/mach-bf533/head.S                    |  767 ++++++
 arch/blackfin/mach-bf533/ints-priority.c           |   69
 arch/blackfin/mach-bf533/pm.c                      |  152 +
 arch/blackfin/mach-bf537/Kconfig                   |  147 +
 arch/blackfin/mach-bf537/Makefile                  |   10
 arch/blackfin/mach-bf537/boards/Makefile           |    7
 arch/blackfin/mach-bf537/boards/cm_bf537.c         |  268 ++
 arch/blackfin/mach-bf537/boards/ezkit.c            |  213 +
 arch/blackfin/mach-bf537/boards/generic_board.c    |  469 +++
 arch/blackfin/mach-bf537/boards/led.S              |  183 +
 arch/blackfin/mach-bf537/boards/stamp.c            |  489 ++++
 arch/blackfin/mach-bf537/cpu.c                     |  169 +
 arch/blackfin/mach-bf537/head.S                    |  584 ++++
 arch/blackfin/mach-bf537/ints-priority.c           |   79
 arch/blackfin/mach-bf537/pm.c                      |  150 +
 arch/blackfin/mach-bf561/Kconfig                   |  224 +
 arch/blackfin/mach-bf561/Makefile                  |    9
 arch/blackfin/mach-bf561/boards/Makefile           |    6
 arch/blackfin/mach-bf561/boards/ezkit.c            |   84
 arch/blackfin/mach-bf561/boards/generic_board.c    |   78
 arch/blackfin/mach-bf561/coreb.c                   |  413 +++
 arch/blackfin/mach-bf561/head.S                    |  504 ++++
 arch/blackfin/mach-bf561/ints-priority.c           |  113
 arch/blackfin/mach-common/Makefile                 |   12
 arch/blackfin/mach-common/bf5xx_rtc.c              |  140 +
 arch/blackfin/mach-common/cache.S                  |  255 ++
 arch/blackfin/mach-common/cacheinit.S              |  140 +
 arch/blackfin/mach-common/cplbhdlr.S               |  128 +
 arch/blackfin/mach-common/cplbinfo.c               |  212 +
 arch/blackfin/mach-common/cplbmgr.S                |  623 +++++
 arch/blackfin/mach-common/dpmc.S                   |  438 +++
 arch/blackfin/mach-common/entry.S                  | 1169 +++++++++
 arch/blackfin/mach-common/flush.S                  |  400 +++
 arch/blackfin/mach-common/interrupt.S              |  255 ++
 arch/blackfin/mach-common/ints-priority-dc.c       |  545 ++++
 arch/blackfin/mach-common/ints-priority-sc.c       |  619 +++++
 arch/blackfin/mach-common/irqpanic.c               |  193 +
 arch/blackfin/mach-common/lock.S                   |  215 +
 arch/blackfin/mm/Makefile                          |    5
 arch/blackfin/mm/blackfin_sram.c                   |  532 ++++
 arch/blackfin/mm/blackfin_sram.h                   |   40
 arch/blackfin/mm/init.c                            |  222 +
 arch/blackfin/mm/kmap.c                            |   86
 arch/blackfin/oprofile/Kconfig                     |   29
 arch/blackfin/oprofile/Makefile                    |   14
 arch/blackfin/oprofile/common.c                    |  170 +
 arch/blackfin/oprofile/op_blackfin.h               |  100
 arch/blackfin/oprofile/op_model_bf533.c            |  168 +
 arch/blackfin/oprofile/timer_int.c                 |   79
 fs/Kconfig.binfmt                                  |    2
 include/asm-blackfin/a.out.h                       |   25
 include/asm-blackfin/atomic.h                      |  176 +
 include/asm-blackfin/auxvec.h                      |    4
 include/asm-blackfin/bf53x_timers.h                |  137 +
 include/asm-blackfin/bf5xx_rtc.h                   |   19
 include/asm-blackfin/bfin-global.h                 |  126 +
 include/asm-blackfin/bfin5xx_spi.h                 |  170 +
 include/asm-blackfin/bfin_spi_channel.h            |  180 +
 include/asm-blackfin/bfin_sport.h                  |  176 +
 include/asm-blackfin/bitops.h                      |  213 +
 include/asm-blackfin/blackfin.h                    |   13
 include/asm-blackfin/board/eagle.h                 |    4
 include/asm-blackfin/board/ezkit.h                 |    4
 include/asm-blackfin/board/hawk.h                  |    4
 include/asm-blackfin/board/pub.h                   |   17
 include/asm-blackfin/bug.h                         |   14
 include/asm-blackfin/bugs.h                        |   16
 include/asm-blackfin/byteorder.h                   |   48
 include/asm-blackfin/cache.h                       |   18
 include/asm-blackfin/cacheflush.h                  |  103
 include/asm-blackfin/checksum.h                    |  101
 include/asm-blackfin/cplb.h                        |   51
 include/asm-blackfin/cplbtab.h                     |  572 ++++
 include/asm-blackfin/cpumask.h                     |    6
 include/asm-blackfin/cputime.h                     |    6
 include/asm-blackfin/current.h                     |   23
 include/asm-blackfin/delay.h                       |   41
 include/asm-blackfin/div64.h                       |    1
 include/asm-blackfin/dma-mapping.h                 |   68
 include/asm-blackfin/dma.h                         |  212 +
 include/asm-blackfin/dpmc.h                        |   66
 include/asm-blackfin/elf.h                         |  127 +
 include/asm-blackfin/emergency-restart.h           |    6
 include/asm-blackfin/entry.h                       |  367 +++
 include/asm-blackfin/errno.h                       |    6
 include/asm-blackfin/fcntl.h                       |   87
 include/asm-blackfin/flat.h                        |  128 +
 include/asm-blackfin/futex.h                       |    6
 include/asm-blackfin/hardirq.h                     |   41
 include/asm-blackfin/hw_irq.h                      |    6
 include/asm-blackfin/ide.h                         |   31
 include/asm-blackfin/io.h                          |  155 +
 include/asm-blackfin/ioctl.h                       |    1
 include/asm-blackfin/ioctls.h                      |   82
 include/asm-blackfin/ipc.h                         |   31
 include/asm-blackfin/ipcbuf.h                      |   30
 include/asm-blackfin/irq.h                         |   85
 include/asm-blackfin/kmap_types.h                  |   21
 include/asm-blackfin/l1layout.h                    |   30
 include/asm-blackfin/linkage.h                     |    7
 include/asm-blackfin/local.h                       |    6
 include/asm-blackfin/mach-bf533/anomaly.h          |  172 +
 include/asm-blackfin/mach-bf533/bf533.h            |  288 ++
 include/asm-blackfin/mach-bf533/bfin_serial_5xx.h  |   81
 include/asm-blackfin/mach-bf533/blackfin.h         |   48
 include/asm-blackfin/mach-bf533/cdefBF532.h        |  691 +++++
 include/asm-blackfin/mach-bf533/defBF532.h         | 1202 ++++++++++
 include/asm-blackfin/mach-bf533/dma.h              |   56
 include/asm-blackfin/mach-bf533/irq.h              |  178 +
 include/asm-blackfin/mach-bf533/mem_init.h         |  314 ++
 include/asm-blackfin/mach-bf533/mem_map.h          |  135 +
 include/asm-blackfin/mach-bf535/bf535.h            | 1285 ++++++++++
 include/asm-blackfin/mach-bf535/bf535_serial.h     |  109
 include/asm-blackfin/mach-bf535/blackfin.h         |   44
 include/asm-blackfin/mach-bf535/cdefBF535.h        |  121 +
 include/asm-blackfin/mach-bf535/cdefblackfin.h     |   69
 include/asm-blackfin/mach-bf535/defBF535.h         | 1154 +++++++++
 include/asm-blackfin/mach-bf535/defblackfin.h      |  444 +++
 include/asm-blackfin/mach-bf535/irq.h              |  125 +
 include/asm-blackfin/mach-bf537/anomaly.h          |  118
 include/asm-blackfin/mach-bf537/bf537.h            |  268 ++
 include/asm-blackfin/mach-bf537/bfin_serial_5xx.h  |  101
 include/asm-blackfin/mach-bf537/blackfin.h         |  440 +++
 include/asm-blackfin/mach-bf537/cdefBF534.h        | 1805 +++++++++++++++
 include/asm-blackfin/mach-bf537/cdefBF537.h        |  209 +
 include/asm-blackfin/mach-bf537/defBF534.h         | 2520 +++++++++++++++++++++
 include/asm-blackfin/mach-bf537/defBF537.h         |  404 +++
 include/asm-blackfin/mach-bf537/dma.h              |   55
 include/asm-blackfin/mach-bf537/irq.h              |  185 +
 include/asm-blackfin/mach-bf537/mem_init.h         |  328 ++
 include/asm-blackfin/mach-bf537/mem_map.h          |  143 +
 include/asm-blackfin/mach-bf561/anomaly.h          |  182 +
 include/asm-blackfin/mach-bf561/bf561.h            |  378 +++
 include/asm-blackfin/mach-bf561/blackfin.h         |   54
 include/asm-blackfin/mach-bf561/cdefBF561.h        | 1528 ++++++++++++
 include/asm-blackfin/mach-bf561/defBF561.h         | 1713 ++++++++++++++
 include/asm-blackfin/mach-bf561/dma.h              |   36
 include/asm-blackfin/mach-bf561/irq.h              |  451 +++
 include/asm-blackfin/mach-bf561/mem_init.h         |  283 ++
 include/asm-blackfin/mach-bf561/mem_map.h          |   61
 include/asm-blackfin/mach-common/cdef_LPBlackfin.h |  474 +++
 include/asm-blackfin/mach-common/def_LPBlackfin.h  |  706 +++++
 include/asm-blackfin/macros.h                      |   95
 include/asm-blackfin/mem_map.h                     |   12
 include/asm-blackfin/mman.h                        |   45
 include/asm-blackfin/mmu.h                         |   30
 include/asm-blackfin/mmu_context.h                 |  130 +
 include/asm-blackfin/module.h                      |   19
 include/asm-blackfin/msgbuf.h                      |   31
 include/asm-blackfin/mutex.h                       |    9
 include/asm-blackfin/namei.h                       |   19
 include/asm-blackfin/page.h                        |   89
 include/asm-blackfin/page_offset.h                 |    6
 include/asm-blackfin/param.h                       |   22
 include/asm-blackfin/pci.h                         |  148 +
 include/asm-blackfin/percpu.h                      |    6
 include/asm-blackfin/pgalloc.h                     |    8
 include/asm-blackfin/pgtable.h                     |   62
 include/asm-blackfin/poll.h                        |   24
 include/asm-blackfin/posix_types.h                 |   65
 include/asm-blackfin/processor.h                   |  104
 include/asm-blackfin/ptrace.h                      |  102
 include/asm-blackfin/resource.h                    |    6
 include/asm-blackfin/scatterlist.h                 |   26
 include/asm-blackfin/sections.h                    |    7
 include/asm-blackfin/segment.h                     |    7
 include/asm-blackfin/semaphore-helper.h            |   82
 include/asm-blackfin/semaphore.h                   |  106
 include/asm-blackfin/sembuf.h                      |   25
 include/asm-blackfin/setup.h                       |   17
 include/asm-blackfin/shmbuf.h                      |   42
 include/asm-blackfin/shmparam.h                    |    6
 include/asm-blackfin/sigcontext.h                  |   50
 include/asm-blackfin/siginfo.h                     |   35
 include/asm-blackfin/signal.h                      |  159 +
 include/asm-blackfin/socket.h                      |   53
 include/asm-blackfin/sockios.h                     |   12
 include/asm-blackfin/spinlock.h                    |    6
 include/asm-blackfin/stat.h                        |   77
 include/asm-blackfin/statfs.h                      |    6
 include/asm-blackfin/string.h                      |   97
 include/asm-blackfin/system.h                      |  212 +
 include/asm-blackfin/termbits.h                    |  173 +
 include/asm-blackfin/termios.h                     |  106
 include/asm-blackfin/thread_info.h                 |  142 +
 include/asm-blackfin/timex.h                       |   18
 include/asm-blackfin/tlb.h                         |   16
 include/asm-blackfin/tlbflush.h                    |   62
 include/asm-blackfin/topology.h                    |    6
 include/asm-blackfin/traps.h                       |   75
 include/asm-blackfin/types.h                       |   66
 include/asm-blackfin/uaccess.h                     |  260 ++
 include/asm-blackfin/ucontext.h                    |   30
 include/asm-blackfin/unaligned.h                   |    6
 include/asm-blackfin/unistd.h                      |  545 ++++
 include/asm-blackfin/user.h                        |   91
 include/linux/elf-em.h                             |    1
 include/linux/usb_sl811.h                          |   26
 init/Kconfig                                       |    3
 init/Kconfig.orig                                  |  516 ++++
 lib/Kconfig.debug                                  |    4
 scripts/genksyms/genksyms.c                        |    3
 scripts/mod/mk_elfconfig.c                         |    3
 251 files changed, 49661 insertions(+), 6 deletions(-)

http://blackfin.uclinux.org/frs/download.php/1010/blackfin_arch_2.6.18.patch
   (same as above link)
-- 
Best regards,
Luke Yang
luke.adi@gmail.com

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-23 16:29 Robin Getz
  2006-09-23 18:10 ` Arnd Bergmann
  0 siblings, 1 reply; 53+ messages in thread
From: Robin Getz @ 2006-09-23 16:29 UTC (permalink / raw)
  To: Arnd Bergmann; +Cc: Mike Frysinger, linux-kernel, Andrew Morton, Luke Yang

Arnd provide some feedback:
>On Saturday 23 September 2006 13:15, Mike Frysinger wrote:
> > On 9/23/06, Arnd Bergmann <arnd@arndb.de> wrote:
> > > On Saturday 23 September 2006 08:50, Mike Frysinger wrote:
> > > > On 9/22/06, Arnd Bergmann <arnd@arndb.de> wrote:
>
> > > > > What's the point, are you getting paid by lines of code? Just use
> > > > > the registers directly!
> > > >
> > > > in our last submission we were doing exactly that ... and we were told
> > > > to switch to a function style method of reading/writing memory mapped
> > > > registers
> > >
> > > It's hard to imagine that what you have here was intended by the comment
> > > then. Do you have an archive link about that discussion?
> >
> > no as i was not around for said discussion.  but it should be in the
> > threads covering the submission of blackfin for 2.6.13 ...
>
>Ok, I found http://marc.theaimsgroup.com/?l=linux-kernel&m=114298753207549&w=2
>from akpm, and I fear you heavily misunderstood him.
>
>Your original patch had code like
>
>/* System Reset and Interrupt Controller registers for core A (0xFFC0 
>0100-0xFFC0 01FF) */
>#define SICA_SWRST              0xFFC00100·····/* Software Reset register */
>[snip]
>...
>
>#define pSICA_SWRST (volatile unsigned short *)SICA_SWRST
>[snip]
>
>static void bf561_internal_mask_irq(unsigned int irq)
>{
>         unsigned long irq_mask;
>         if ((irq - (IRQ_CORETMR + 1)) < 32) {
>                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
>                 pSICA_IMASK0 &= ~irq_mask;
>         } else {
>                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
>                 pSICA_IMASK1 &= ~irq_mask;
>         }
>}
>
>which Andrew objected to, on multiple grounds. You now converted this to
>
>/* System Reset and Interrupt Controller registers for core A (0xFFC0 
>0100-0xFFC0 01FF) */
>#define SICA_SWRST              0xFFC00100·····/* Software Reset register */
>[snip]
>/* System Reset and Interrupt Controller registers for core A (0xFFC0 
>0100-0xFFC0 01FF) */
>#define bfin_read_SICA_SWRST()               bfin_read16(SICA_SWRST)
>[snip]
>
>...
>static void bf561_internal_mask_irq(unsigned int irq)
>{
>         unsigned long irq_mask;
>         if ((irq - (IRQ_CORETMR + 1)) < 32) {
>                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
>                 bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() & ~irq_mask);
>         } else {
>                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
>                 bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() & ~irq_mask);
>         }
>}
>
>which is about just as bad, but for different reasons.

I would be interested in the reasons why this is bad. We thought is solved 
the problem, and our driver developers are Ok using it, and it is catching 
more problems at compile time than we use to (which is the main reason I 
thought to remove all the volatile casting.

>Now, there are
>at least two common methods for how to do this better, both involving
>the readl/writel low-level accessors (or something similar).

The thing to understand about the Blackfin architecture - is not all system 
register, or peripheral registers are 32 bits. Some are 16 bits, and some 
are 32. The Hardware will error if you access a 32 bit instruction, with a 
16 bit access, or a 16 bit access on a 32 bit instruction.

This is why we added:
bfin_write16();  bfin_read16(); bfin_write32();  bfin_read32();

We can't use a common function, like:

bfin_sica_read(int reg)

or use the read16/read32 directly - it would be to hard for the driver 
developers to keep the manual with them all the time to find out if a 
register was 16 or 32 bits. It would move what we have today (compiler 
errors), to run time errors if someone used the wrong function.

>The first one uses enumerated register numers:
>
>/* System Reset and Interrupt Controller registers for core A (0xFFC0 
>0100-0xFFC0 01FF) */
>
>enum bfin_sica_regs {
>         SICA_SWRST   = 100,·····/* Software Reset register */
>         SICA_SYSCR   = 104,·····/* System Reset Configuration register */
>         SICA_RVECT   = 108,·····/* SIC Reset Vector Address Register */
>         SICA_IMASK   = 10C,·····/* SIC Interrupt Mask register 0 - hack 
> to fix old tests */
>         SICA_IMASK0  = 10C,·····/* SIC Interrupt Mask register 0 */
>         SICA_IMASK1  = 110,·····/* SIC Interrupt Mask register 1 */
>         SICA_IAR0    = 124,·····/* SIC Interrupt Assignment Register 0 */
>         SICA_IAR1    = 128,·····/* SIC Interrupt Assignment Register 1 */
>         SICA_IAR2    = 12C,·····/* SIC Interrupt Assignment Register 2 */
>         SICA_IAR3    = 130,·····/* SIC Interrupt Assignment Register 3 */
>         SICA_IAR4    = 134,·····/* SIC Interrupt Assignment Register 4 */
>         SICA_IAR5    = 138,·····/* SIC Interrupt Assignment Register 5 */
>         SICA_IAR6    = 13C,·····/* SIC Interrupt Assignment Register 6 */
>         SICA_IAR7    = 140,·····/* SIC Interrupt Assignment Register 7 */
>         SICA_ISR0    = 114,·····/* SIC Interrupt Status register 0 */
>         SICA_ISR1    = 118,·····/* SIC Interrupt Status register 1 */
>         SICA_IWR0    = 11C,·····/* SIC Interrupt Wakeup-Enable register 0 */
>         SICA_IWR1    = 120,·····/* SIC Interrupt Wakeup-Enable register 1 */
>};
>
>...
>
>static void __iomem *bfin_sica = (void __iomem *)0xffc00100ul;
>static inline __le32 bfin_sica_read(int reg)
>{
>         return (__le32)readl(bfin_sica + reg);
>}
>
>static inline void bfin_sica_write(int reg, __le32 val)
>{
>         writel((uint32_t)val, bfin_sica + reg);
>}
>
>static void bf561_internal_mask_irq(unsigned int irq)
>{
>         unsigned long irq_mask;
>         if ((irq - (IRQ_CORETMR + 1)) < 32) {
>                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
>                 bfin_sica_write(SICA_IMASK0,
>                         bfin_sica_read(SICA_IMASK0) & ~irq_mask);
>         } else {
>                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
>                 bfin_sica_write(SICA_IMASK0,
>                         bfin_sica_read(SICA_IMASK0) & ~irq_mask);
>         }
>}
>
>The alternative approach uses a structure:

We could use this approach, filling it up with 16 bit padding all over the 
place (which is easy to do), but it is also difficult for the same reason. 
(Although I really like this, and can see lots of value from it - I am not 
sure we can use it).

You are still using writel(reg, value) and readl(reg) - which is hard to 
do, without a hardware reference beside you all the time - to determine 
which time you should use a readl or reads.

Unless I am completely missing something (which might be true).


>/* System Reset and Interrupt Controller registers for core A (0xFFC0 
>0100-0xFFC0 01FF) */
>
>struct bfin_sica_regs {
>         __le32 swrst;   /* Software Reset register */
>         __le32 syscr;   /* System Reset Configuration register */
>         __le32 rvect;   /* SIC Reset Vector Address Register */
>         __le32 imask[2]; /* SIC Interrupt Mask register 0-1 */
>         __le32 iar[8];  /* SIC Interrupt Assignment Register 0-7 */
>         __le32 isr[2];  /* SIC Interrupt Status register 0-1 */
>         __le32 iwr[2];  /* SIC Interrupt Wakeup-Enable register 0-2 */
>};
>
>...
>
>static struct bfin_sica_regs __iomem *bfin_sica = (void __iomem 
>*)0xffc00100ul;
>
>static void bf561_internal_mask_irq(unsigned int irq)
>{
>         int irqnr = irq - (IRQ_CORETMR + 1);
>         __le32 __iomem *reg = &bfin_sica->imask[irqnr >> 5];
>         unsigned long irq_mask = 1 << (irqnr & 0x1f);
>
>         writel(reg, readl(reg) & ~irq_mask);
>}
>
>I'd personally prefer the last approach because of its compactness.
>
>         Arnd <><

Although I think the code is smaller, and nicer - it involves more run time 
complexity, and will consume more processor cycles - the old example:

static void bf561_internal_mask_irq(unsigned int irq)
{
         unsigned long irq_mask;
         if ((irq - (IRQ_CORETMR + 1)) < 32) {
                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
                 bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() & ~irq_mask);
         } else {
                 irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
                 bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() & ~irq_mask);
         }
}

resolves all addresses at compile time, not run time. So, wouldn't your 
example slow things down?

-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-23 17:57 Robin Getz
  0 siblings, 0 replies; 53+ messages in thread
From: Robin Getz @ 2006-09-23 17:57 UTC (permalink / raw)
  To: Matthieu CASTET; +Cc: linux-kernel

Matthieu wrote:
>On Sat, 23 Sep 2006 02:50:02 -0400, Mike Frysinger wrote:
> >> It would be nice if you could use a generic way to pass this
> >> partition data to the kernel from the mtd medium, instead of 
> hardcoding it here.
> >
> > i often wish for such things myself :)
> >
> > unfortunately, the boot loader we utilize (u-boot) isnt exactly
> > friendly to the idea of managing flash partitions like redboot, and
> > what we have here is the current standard method for defining flash
> > partitions with mtd
> >
>
>humm you could use cmdlinepart [1] and pass the partition as a kernel 
>string with uboot.
>
>That's what we are doing and it works perfectly.

Thanks for the pointer - we will have a look.

> >> > +/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
> >> > +#define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
> >> > +#define bfin_write_PLL_CTL(val)              bfin_write16(PLL_CTL,val)
> >> > +#define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
> >> (and 700 more of these)
> >>
> >> What's the point, are you getting paid by lines of code? Just use the
> >> registers directly!
> >
> > in our last submission we were doing exactly that ... and we were told
> > to switch to a function style method of reading/writing memory mapped
> > registers
>hum, IRRC in your last submission you used volatile to read/write register.
>Some people told you that volatile are evil and you should use a function 
>to read them.
>
>But there no need to these defines. Just use bfin_read16(register_name) in 
>your code.

But then all the driver developers need to remember if a register is 16 or 
32 bits. Blackfin peripherals mix and match, depending on what the silicon 
designer decided what good at the time. (which means if it fits in 16 bits, 
it is a 16-bit register).

I guess we are all lazy, and don't want to have to go through the 
complexity of looking up each register when we use it in a driver.

calling bfin_read_PLL_CTL() which is defined and typecast properly as short 
bfin_read16(PLL_CTL), ensure we resolve issues like this at compile time, 
without having to keep the manual in front of us.

-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-23 23:25 Robin Getz
  2006-09-24  7:29 ` David Woodhouse
  0 siblings, 1 reply; 53+ messages in thread
From: Robin Getz @ 2006-09-23 23:25 UTC (permalink / raw)
  To: David Woodhouse; +Cc: linux-kernel, luke Yang, Andrew Morton


>On Thu, 2006-09-21 at 11:32 +0800, Luke Yang wrote:
> >   This is the blackfin architecture for 2.6.18, again.
>
>Please run 'make headers_check' for blackfin and then verify that you can 
>build libc against the resulting headers.

We can't build libc, but we can build uClibc ;)

This is how we build our toolchain today (mostly). - now we do a make 
prepare, but we will update it.

-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-25 23:21 Robin Getz
  0 siblings, 0 replies; 53+ messages in thread
From: Robin Getz @ 2006-09-25 23:21 UTC (permalink / raw)
  To: Arnd Bergmann; +Cc: Mike Frysinger, linux-kernel, Andrew Morton, luke Yang

Arnd Bergmann wrote:
>On Saturday 23 September 2006 18:29, Robin Getz wrote:
> > I would be interested in the reasons why this is bad. We thought is
> > solved the problem, and our driver developers are Ok using it, and it
> > is catching more problems at compile time than we use to (which is the
> > main reason I thought to remove all the volatile casting.
>
>It adds a lot of unnecessary defines. The problem is mostly that for each 
>register you add three macros.

That is what host machines are good for - isn't it - keeping track of 
redirection? :)

>The simplest way to avoid this would be using your bfin_write16() and 
>related functions directly instead of wrapping each register in a separate 
>macro.

Right - but I am lazy, and I don't want to remember which is a 16 and which 
is a 32 when I am maintaining the software.

Having the extra define is good in that it allows hardware nastiness to be 
hidden. For example, we just fixed an issue about how to write to a 
register that effects the PLL stability.

/* Writing to VR_CTL initiates a PLL relock sequence. */
static __inline__ void bfin_write_VR_CTL(unsigned int val) {
         unsigned long flags, iwr ;

         bfin_write16(VR_CTL,val);
         __builtin_bfin_ssync();
         /* Enable the PLL Wakeup bit in SIC IWR */
         iwr = bfin_read32(SIC_IWR);
         /* Only allow PPL Wakeup) */
         bfin_write32(SIC_IWR, IWR_ENABLE(0));
         local_irq_save(flags);
         asm("IDLE;");
         local_irq_restore(flags);
         bfin_write32(SIC_IWR, iwr);
}

There are a few bits in the register that controls the on-chip MAC - in the 
ethernet driver, the person was just writing to the register, without 
understanding that it unlocked/re-locked the PLL.

This saves every person who writes to this register from duplicating the 
code, and we ensures that it is actually done it properly.

> > >Now, there are
> > >at least two common methods for how to do this better, both involving
> > >the readl/writel low-level accessors (or something similar).
> >
> > The thing to understand about the Blackfin architecture - is not all
> > system register, or peripheral registers are 32 bits. Some are 16
> > bits, and some are 32. The Hardware will error if you access a 32 bit
> > instruction, with a
> > 16 bit access, or a 16 bit access on a 32 bit instruction.
> >
> > This is why we added:
> > bfin_write16(); bfin_read16(); bfin_write32(); bfin_read32();
>
>Sure, that's not unusual at all. Instead of readl(), you can use
>readw() for 16 bit accesses. Your bfin_{read,write}{16,32} functions are 
>fine as well, but you should make the implementation more robust and change
>
>
>#define bfin_read16(addr) ({
>         unsigned __v; \
>         __asm__ __volatile__ ("NOP;\n\t %0 = w[%1] (z);\n\t" \
>         : "=d"(__v) : "a"(addr)); \
>         unsigned short)__v; \
>})
>
>to
>
>static inline __le16 bfin_read16(const __be16 __iomem *addr) {
>         __be16 val;
>         asm volatile("nop; \n\t %0 = w[%1] (z)" : "=d" (val) : "a"(addr);
>         return val;
>}
>
>This adds strict type checking (size, endianess, io address space).
>You may prefer to use u16 instead of __be16 here, depending on your needs.

No problem - I can change/update that.

> > We can't use a common function, like:
> >
> > bfin_sica_read(int reg)
> >
> > or use the read16/read32 directly - it would be to hard for the driver
> > developers to keep the manual with them all the time to find out if a
> > register was 16 or 32 bits. It would move what we have today (compiler
> > errors), to run time errors if someone used the wrong function.
>
>Ok, in the example I picked they were all the same size, so I assumed that 
>would be the case for most of your register areas.

[snip]

> > >
> > >The alternative approach uses a structure:
> >
> > We could use this approach, filling it up with 16 bit padding all over
> > the place (which is easy to do), but it is also difficult for the same 
> reason.
> > (Although I really like this, and can see lots of value from it - I am
> > not sure we can use it).
> >
> > You are still using writel(reg, value) and readl(reg) - which is hard
> > to do, without a hardware reference beside you all the time - to
> > determine which time you should use a readl or reads.
> >
> > Unless I am completely missing something (which might be true).
>
>Ok, I see your point. If you have different size registers in the area for 
>a single device, then it is better to use a structure as I showed below.
>
> > >static struct bfin_sica_regs __iomem *bfin_sica = (void __iomem
> > >*)0xffc00100ul;
> > >
>
> > Although I think the code is smaller, and nicer - it involves more run
> > time complexity, and will consume more processor cycles - the old example:
> >
> > static void bf561_internal_mask_irq(unsigned int irq) {
> >     unsigned long irq_mask;
> >     if ((irq - (IRQ_CORETMR + 1)) < 32) {
> >         irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
> >         bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() &
> > ~irq_mask);
> >     } else {
> >         irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
> >         bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() &
> > ~irq_mask);
> >     }
> > }
> >
> > resolves all addresses at compile time, not run time. So, wouldn't
> > your example slow things down?
>
>The run time overhead of this is very small compared to an actual mmio 
>register access, so you should not notice this at all.

I'm not sure I agree - on machines with tiny cache (only 16k), and high 
Core Clocks (600+ MHz), and slow SDRAM clocks (133MHz), extra reads to 
SDRAM will kill performance & pollute cache. It is not just the single 
cycle read - if the core is writing something into SDRAM, it takes 12 SDRAM 
cycles for the SDRAM to turn the bus from a write to a read.

run time overhead is critical to us. People are complaining already that 
the overhead of our drivers is too high, and I don't want to add extra 
reads to SDRAM if I don't have to.

>You can still do the same with a compile time constant by replacing
>
>static struct bfin_sica_regs __iomem *bfin_sica = (void __iomem 
>*)0xffc00100ul;
>
>from my example with
>
>#define bfin_sica_regs ((struct bfin_sica_regs __iomem*)0xffc00100ul)
>
>That should result in the same object code you had before.
>
>However, I'm used to having a single kernel binary that can run on 
>multiple hardware versions. Normally this means that you have the same 
>register layout on every CPU, but on different physical addresses that are 
>detected at boot time, so I like to avoid hardcoding absolute addresses in 
>the object code.

People who use our architecture are OK with compiling for a specific platform.

>Moreover, if you ever want to run with an MMU, the virtual address of that 
>device is computed by the ioremap function, like
>
>static struct bfin_sica_regs __iomem *bfin_sica;
>
>void __init bfin_init_sica(void)
>{
>         bfin_sica = ioremap(0xffc00100ul);
>}

There are no plans to add a MMU to the Blackfin as is - it would require an 
extensive change to the architecture.

But still - I can see the value of it for large scale systems, where people 
are not willing to compile a kernel targeted at one specific implementation 
- but the people who use this kernel are worse - they compile a kernel for 
a specific board, not a just a specific processor. Anything extra - they 
don't want it. Anything they need - they normally put it in the kernel, as 
to reduce boot time/size.

The processor sells for less than a good cup of coffee. People are selling 
complete systems (processor, SDRAM, Flash, etc) for less than $50 (US).

People want to do, and expect to do, all kinds of optimizations when they 
are working at this level.

This is the hesitation of adding levels of indirection - any additional 
overhead - and people will stop using Linux - but I will try out the 
structure, and see how that works.

-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-27 16:25 Robin Getz
  2006-09-27 16:36 ` Randy Dunlap
                   ` (2 more replies)
  0 siblings, 3 replies; 53+ messages in thread
From: Robin Getz @ 2006-09-27 16:25 UTC (permalink / raw)
  To: arnd Bergmann; +Cc: luke Yang, Andrew Morton, linux-kernel

Arnd wrote:
>Ok, looks good now. Just a few details that don't impact the
>functionality:

[snip]

What I committed (to our source) is:

+++ process.c   27 Sep 2006 15:32:46 -0000      1.42
@@ -101,10 +101,10 @@
  {
         while (!need_resched()) {
                 leds_switch(LED_OFF);
-             __asm__("nop;\n\t \
-                         nop;\n\t \
-                         nop;\n\t \
-                         idle;\n\t": : :"cc");
+               local_irq_disable();
+               if (likely( !need_resched()))
+                       idle_with_irq_disabled();
+               local_irq_enable();
                 leds_switch(LED_ON);
         }
  }

And in system.h, this was added (because this is where all the other 
inlines is which messes with the interrupts are - and irq_flags is already 
defined here)

+++ system.h    27 Sep 2006 15:32:51 -0000      1.24

+#define idle_with_irq_disabled() do {   \
+        __asm__ __volatile__ (          \
+                "nop; nop;\n"           \
+                ".align 8;\n"           \
+                "sti %0; idle;\n"       \
+                ::"d" (irq_flags));     \
+} while (0)

It seems to work OK.

Thanks for your help on this.

I think we have been weeding through everyone's comments, and have most 
things fixed up.

Are there any other major issues that you can see (that have not been 
pointed out).

-Robin

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-27 17:47 Robin Getz
  2006-09-27 19:19 ` Jörn Engel
  0 siblings, 1 reply; 53+ messages in thread
From: Robin Getz @ 2006-09-27 17:47 UTC (permalink / raw)
  To: Randy Dunlap; +Cc: arnd Bergmann, luke Yang, Andrew Morton, linux-kernel

Randy wrote:

>except for coding style nits.  E.g., the patch above:
>a.  uses spaces instead of tabs for indentation

yeah - my copy/paste/mailer is broken - when it copies tabs, it pastes 
space into the mailer.

>b.  has an extra (unwanted) space in:
> > +               if (likely( !need_resched()))
>                              ^

There are still lots of places where we need to fix up broken white space 
in our patches.

Does anyone have a script that identifies white space problems?

Thanks
-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-27 21:22 Robin Getz
  2006-09-27 21:36 ` Arnd Bergmann
  0 siblings, 1 reply; 53+ messages in thread
From: Robin Getz @ 2006-09-27 21:22 UTC (permalink / raw)
  To: Arnd Bergmann; +Cc: luke Yang, Andrew Morton, linux-kernel

Arnd wrote:
>Am Wednesday 27 September 2006 19:19 schrieb Robin Getz:
> > OK - I was just doing the similar thing to what already exists in
> > ./asm-blackfin/system.h
> >
> > #define local_irq_enable() do {         \
> >          __asm__ __volatile__ (          \
> >                  "sti %0;"               \
> >                  ::"d"(irq_flags));      \ } while (0)
> >
> > which could be simplified to:
> >
> > #define local_irq_enable() __asm__ __volatile__ ("sti %0;"
> > ::"d"(irq_flags));
>
>Actually, this one is slightly broken, because of the ';' at the end of 
>the macro (think of "if(x) local_irq_enable(); else somthing_else()").

Ok - the extra ; is a typo in the email - not anything that I was proposing 
as a submission. What you are pointing out is to be _really_ careful when 
doing macros.

I was trying to say was that we are just doing what everyone else seems to 
be doing (which doesn't make it correct or the proper thing to do).

Systems that use macros:
./asm-alpha/system.h:#define local_irq_enable()
./asm-arm26/system.h:#define local_irq_enable()
./asm-arm/system.h:#define local_irq_enable()
./asm-blackfin/system.h:#define local_irq_enable()
./asm-frv/system.h:#define local_irq_enable()
./asm-h8300/system.h:#define local_irq_enable()
./asm-i386/system.h:#define local_irq_enable()
./asm-ia64/system.h:#define local_irq_enable()
./asm-m32r/system.h:#define local_irq_enable()
./asm-m68knommu/system.h:#define local_irq_enable()
./asm-m68k/system.h:#define local_irq_enable()
./asm-parisc/system.h:#define local_irq_enable()
./asm-s390/system.h:#define local_irq_enable()
./asm-sparc64/system.h:#define local_irq_enable()
./asm/system.h:#define local_irq_enable()
./asm-v850/system.h:#define local_irq_enable()
./asm-x86_64/system.h:#define local_irq_enable()
./asm-x86_64/system.h:#define local_irq_enable()

Systems that use static inline:
./asm-m32r/system.h:static inline void local_irq_enable(void)
./asm-sh64/system.h:static __inline__ void local_irq_enable(void)
./asm-sh/system.h:static __inline__ void local_irq_enable(void)
./asm-xtensa/system.h:static inline void local_irq_enable(void)

With the "optimizations" that gcc4 is making with inline being only a 
"suggestion", I think I would prefer to stick with the macro, unless there 
is violent opposition.

As Mike pointed out - we are sheep - we just do what the majority (18/22) 
of other people do.

-Robin

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-27 22:56 Robin Getz
  0 siblings, 0 replies; 53+ messages in thread
From: Robin Getz @ 2006-09-27 22:56 UTC (permalink / raw)
  To: Jörn Engel; +Cc: linux-kernel

Jörn told me:
>On Wed, 27 September 2006 13:47:16 -0400, Robin Getz wrote:
> >
> > Does anyone have a script that identifies white space problems?
>If you use vim:
>highlight RedundantSpaces ctermbg=red guibg=red
>match RedundantSpaces /\s\+$\| \+\ze\t/

which lead me to:
http://www.vim.org/tips/tip.php?tip_id=1040
and
http://www.vim.org/tips/tip.php?tip_id=811

When you know what to search for - things are much easier to find...

Thanks for the pointer.

-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread
* Re: [PATCH 1/4] Blackfin: arch patch for 2.6.18
@ 2006-09-27 23:01 Robin Getz
  0 siblings, 0 replies; 53+ messages in thread
From: Robin Getz @ 2006-09-27 23:01 UTC (permalink / raw)
  To: Arnd Bergmann; +Cc: luke Yang, Andrew Morton, linux-kernel

Arnd wrote:
>An even better strategy is to do what the better architecture 
>implementations in linux do and to apply common sense. "better" of course 
>is rather subjective, but I typically recommend looking at arch/parisc as 
>a good example.

Sure - we will go with that.

./linux-2.6.x/include/asm-parisc/system.h

/* interrupt control */
#define local_save_flags(x)     __asm__ __volatile__("ssm 0, %0" : "=r" (x) 
: : "memory")
#define local_irq_disable()     __asm__ __volatile__("rsm %0,%%r0\n" : : 
"i" (PSW_I) : "memory" )
#define local_irq_enable()      __asm__ __volatile__("ssm %0,%%r0\n" : : 
"i" (PSW_I) : "memory" )

:)

-Robin 

^ permalink raw reply	[flat|nested] 53+ messages in thread

end of thread, other threads:[~2006-09-28 12:35 UTC | newest]

Thread overview: 53+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2006-09-21  3:32 [PATCH 1/4] Blackfin: arch patch for 2.6.18 Luke Yang
2006-09-21  9:59 ` Luke Yang
2006-09-23  0:18 ` Arnd Bergmann
2006-09-23  1:18   ` Randy.Dunlap
2006-09-23  1:24     ` Roland Dreier
2006-09-23  1:58       ` Mike Frysinger
2006-09-23  6:50   ` Mike Frysinger
2006-09-23 11:03     ` Arnd Bergmann
2006-09-23 11:15       ` Mike Frysinger
2006-09-23 11:29         ` Arnd Bergmann
2006-09-23 13:07         ` Arnd Bergmann
2006-09-23 11:28     ` Matthieu CASTET
2006-09-23 11:35       ` Mike Frysinger
2006-09-23 19:43     ` Arnd Bergmann
2006-09-24  3:49       ` Luke Yang
2006-09-24  3:35   ` Aubrey
2006-09-24  3:50     ` Randy Dunlap
2006-09-24  4:28       ` Aubrey
2006-09-25  6:54     ` Arnd Bergmann
2006-09-25  7:49       ` Aubrey
2006-09-25  9:26         ` Arnd Bergmann
2006-09-25  9:39           ` Luke Yang
2006-09-25  9:45           ` Aubrey
2006-09-25 15:39           ` Aubrey
2006-09-25 17:05             ` Arnd Bergmann
2006-09-26  3:42               ` Aubrey
2006-09-26  9:43                 ` Arnd Bergmann
2006-09-27 10:04               ` Aubrey
2006-09-27 11:37                 ` Arnd Bergmann
2006-09-23 21:27 ` David Woodhouse
2006-09-25 16:52 ` Randy Dunlap
2006-09-25 18:05   ` Mike Frysinger
  -- strict thread matches above, loose matches on Subject: below --
2006-09-23 16:29 Robin Getz
2006-09-23 18:10 ` Arnd Bergmann
2006-09-23 17:57 Robin Getz
2006-09-23 23:25 Robin Getz
2006-09-24  7:29 ` David Woodhouse
2006-09-25 23:21 Robin Getz
2006-09-27 16:25 Robin Getz
2006-09-27 16:36 ` Randy Dunlap
2006-09-27 16:41 ` Arnd Bergmann
2006-09-27 17:19 ` Robin Getz
2006-09-27 20:57   ` Arnd Bergmann
2006-09-28  9:31     ` Bernd Schmidt
2006-09-28 11:04       ` Arnd Bergmann
2006-09-28 11:39         ` Bernd Schmidt
2006-09-28 12:35           ` Arnd Bergmann
2006-09-27 17:47 Robin Getz
2006-09-27 19:19 ` Jörn Engel
2006-09-27 21:22 Robin Getz
2006-09-27 21:36 ` Arnd Bergmann
2006-09-27 22:56 Robin Getz
2006-09-27 23:01 Robin Getz

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