From: Roland Dreier <rdreier@cisco.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Stephen Hemminger <shemminger@osdl.org>,
Greg Kroah-Hartman <gregkh@suse.de>,
linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/6] MTHCA driver (infiniband) use new pci interfaces
Date: Mon, 11 Dec 2006 17:38:24 -0800 [thread overview]
Message-ID: <adafyblzyen.fsf@cisco.com> (raw)
In-Reply-To: <1165809339.7260.19.camel@localhost.localdomain> (Benjamin Herrenschmidt's message of "Mon, 11 Dec 2006 14:55:39 +1100")
> I'm worried by this... At no point do you check the host bridge
> capabilities, and thus will happily set the max read req size to some
> value larger than the max the host bridge can cope...
Well, it's disabled by default... the option is there as a quick way
to fix "why is my bandwidth so low" when a broken BIOS sets these to
minimum values. Maybe we should just strip out that code and point
people who want to tweak this at setpci instead.
> So for PCI-X, if we want tat, we need a pcibios hook for the platform
> to validate the size requested. For PCI-E, we can use standard code to
> look for the root complex (and bridges on the path to it) and get the
> proper max value.
Actually even PCIe might not be that easy. For example with current
kernels on PowerPC 440SPe (SoC with PCIe), I just get:
# lspci
00:01.0 InfiniBand: Mellanox Technology: Unknown device 6274 (rev a0)
ie no host bridge / root complex.
- R.
next prev parent reply other threads:[~2006-12-12 1:38 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-12-08 18:22 [PATCH 0/6] PCI-X/PCI-Express read control interfaces Stephen Hemminger
2006-12-08 18:22 ` [PATCH 1/6] PCI-X Max Read Byte Count interface Stephen Hemminger
2006-12-08 22:56 ` [PATCH 1/6] PCI-X Max Read Byte Count interface (v2) Stephen Hemminger
2006-12-08 18:22 ` [PATCH 2/6] e1000: use pcix_set_mmrbc Stephen Hemminger
2006-12-08 21:45 ` Roland Dreier
2006-12-08 22:43 ` Stephen Hemminger
2006-12-08 22:58 ` Auke Kok
2006-12-08 23:38 ` Jeff Kirsher
2006-12-08 18:22 ` [PATCH 3/6] PCI Express get/set read request size Stephen Hemminger
2006-12-08 18:22 ` [PATCH 4/6] MTHCA driver (infiniband) use new pci interfaces Stephen Hemminger
2006-12-08 21:46 ` Roland Dreier
2006-12-11 3:55 ` Benjamin Herrenschmidt
2006-12-11 5:56 ` Grant Grundler
2006-12-12 1:38 ` Roland Dreier [this message]
2006-12-12 1:59 ` Benjamin Herrenschmidt
2006-12-08 18:22 ` [PATCH 5/6] QLA2 use pci read tuning interface Stephen Hemminger
2006-12-08 18:22 ` [PATCH 6/6] PCI-X relaxed ordering interface Stephen Hemminger
2006-12-11 3:48 ` [PATCH 0/6] PCI-X/PCI-Express read control interfaces Benjamin Herrenschmidt
2006-12-14 0:17 ` Stephen Hemminger
2006-12-14 0:34 ` Benjamin Herrenschmidt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=adafyblzyen.fsf@cisco.com \
--to=rdreier@cisco.com \
--cc=benh@kernel.crashing.org \
--cc=gregkh@suse.de \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@atrey.karlin.mff.cuni.cz \
--cc=shemminger@osdl.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox