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To: Greg KH <gregkh@suse.de>
Cc: "Kok, Auke" <auke-jan.h.kok@intel.com>,
       "Williams, Mitch A" <mitch.a.williams@intel.com>,
       linux-kernel@vger.kernel.org, mingo@redhat.com,
       "Ronciak, John" <john.ronciak@intel.com>,
       "Brandeburg, Jesse" <jesse.brandeburg@intel.com>
Subject: Re: [PATCH 2.6.20.3] Flush writes to MSI-X table
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	<20070324002802.GA18061@suse.de> <20070324003030.GA18615@suse.de>
	<4605B555.3020107@intel.com> <20070324234154.GA10057@suse.de>
From: Roland Dreier <rdreier@cisco.com>
Date: Sat, 24 Mar 2007 19:00:32 -0700
In-Reply-To: <20070324234154.GA10057@suse.de> (Greg KH's message of "Sat, 24 Mar 2007 16:41:54 -0700")
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 > I don't understand your need to try to rush an api change like this in
 > so quickly in an area that has a lot of churn and disagreement lately.
 > _Especially_ so late in the release cycle, and with no hardware publicly
 > availble.

I'm not sure I understood this thread properly, but if I did understand
correctly then this bug affects IRQ balancing on any device with MSI-X
enabled.  In which case, there's plenty of publicly available hardware
with MSI-X support (including drivers in the mainline tree for a long
time).  A quick grep for pci_enable_msix finds plenty of drivers using
MSI-X now: cciss, ib_mthca, cxgb3, forcedeth, s2io, qla2xxx.

 - R.