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To: Manu Abraham <abraham.manu@gmail.com>
Cc: Grant Grundler <grundler@parisc-linux.org>, Greg KH <greg@kroah.com>,
       linux-pci@atrey.karlin.mff.cuni.cz,
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Subject: Re: PCIE
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From: Roland Dreier <rdreier@cisco.com>
Date: Sun, 27 May 2007 18:15:49 -0700
In-Reply-To: <46588A3D.2060208@gmail.com> (Manu Abraham's message of "Sat, 26 May 2007 23:27:57 +0400")
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 > >> Another question would be if the device supports multiple messages, MSIX
 > >> should be used ?
 > > 
 > > Yes. Assuming the device supports multiple MSI-X messages.

At least on my device (PCI ID 1131:7162) there is no MSI-X capability,
so that's not an option for you.  The current Linux implementation
does not support more than one MSI interrupt, so you just get one
interrupt with pci_enable_msi().

I think it's probably simplest for you to forget about MSI until you
have the basic driver working.

 > Ok. Alongwith this, i am a bit confused with the mailbox approach of
 > sending messages, every register type has it's own set of interrupt
 > registers (for example I2C, say I2C has it's own set of 32 STATUS
 > bitfields for it's interrupt, the same goes for the others)
 > 
 > Another aspect is the DTL-MMIO interface, which isn't defined any place.
 > Using the base addresses as an offset to the normal MMIO obtained using
 > pci_resource_*/ioremap() doesn't seem to work at all.

 > [etc....]

All this is device-specific stuff ... not sure how much anyone can
help you if you can't share the docs.

 - R.