Re: 2.6.18-rc5-mm1: drivers/infiniband/hw/amso1100/c2.c compile error

[Roland Dreier <rdreier@cisco.com>]

    Andrew> If the hardware/driver absolutely requires that the 64-bit
    Andrew> write be atomic on-the-bus then sure, the fix is to
    Andrew> disable that driver on that architecture in Kconfig.

    Andrew> If, however, the atomicity requirement is a software thing
    Andrew> (we need to be atomic against other CPU reads and writes)
    Andrew> then that can be solved with locking, and we can design
    Andrew> APIs for this which can be implemented efficiently on all
    Andrew> architectures.

It seems that there are cases of both.  ipath needs actual 64-bit bus
transactions to work properly.  mthca needs to make sure that if
doorbell writes are split into two 32-bit halves, then no other writes
go to the same MMIO page in between the halves.

What do you think the API would look like?  Something along the lines
of mthca_doorbell.h, where we have macros for

DECLARE_WRITEQ_LOCK()
INIT_WRITEQ_LOCK()
GET_WRITEQ_LOCK()

which get stubbed out on architectures where writeq is already atomic,
and then pass the lock into writeq()?

But then you probably need some Kconfig symbol to say if writeq() is
really atomic or just software atomic (for ipath et al to depend on).

 - R.

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VGER BF report: H 0