From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1FF03B47DB for ; Thu, 9 Apr 2026 16:01:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775750467; cv=none; b=cbvhfevaU4qP4hei4ZZpGfjdRB++opR7H5FmJoteVRQJQWHpNUvr0ZRAdIhpDfHTtPUUVjOrTxk/CS9BJt0eamysLLx4XNJoyCJ8HCEIwtzU6beFfF5YOSAWQZLVEPRmtltvOYLCKiu5XruuFs4SFAM9uz6A9J+vbudMHWyXnlo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775750467; c=relaxed/simple; bh=ZgUt4Ezeh557vvTLSrqR4S54Y652Q/t0dckj9LscU7A=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=llRqVspr7UiUTjZlDkBBqUM04XN50Y4Sj082vkw+8jzgE1qIyrf5wHi8hn6bm0GEEq24iD7B++47giD4/9hWIw020DYldBW5hKdyJ/qkT1RqKnRgkFuxQV+UHY9VsqXoRy47HIjzqMUORcQ0kUiUw7fM78pAZmTGcybPscsn2LM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=LGJlLFJQ; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="LGJlLFJQ" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Sender:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=R2I4AVmopRlJzqMZliNphlchMvKBuATlAqtlyPTDHL0=; b=LGJlLFJQvlNlkVNRAOE75YZYf+ jULZa30Z53T0KhMnkhc58pENVcvdaadEnLVtDksACyC2r3++5IuoSJuVZG14kzsYrbymFyNUmp4US NHM/dtMzhShRRI7NsXIyIWQLa0EbO0xQ9mgmldXcgIg26KggUmwBArWA31I5FAh2ipv5JIojs3nXK 8xm//kdQMu75LebuxyiyHbdibfJ4tOaXBAVKlHGQPR6nA63GZy4sP/yHmkJO421fXSAtlsR1EuM+l LhXwL70k9cVmCJvt2A+R19y/xp3+2JAgGt3/kgZ2QhyRi4eb0OMCQRJFAa6gduFne/JJWCeYzmfRk BRPWFZ5g==; Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:51602) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wAroP-000000003qO-1YKq; Thu, 09 Apr 2026 17:00:57 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.98.2) (envelope-from ) id 1wAroN-000000004WJ-3Jol; Thu, 09 Apr 2026 17:00:55 +0100 Date: Thu, 9 Apr 2026 17:00:55 +0100 From: "Russell King (Oracle)" To: Brian Ruley Cc: Will Deacon , Steve Capper , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] mm/arm: pgtable: remove young bit check for pte_valid_user Message-ID: References: <20260409125446.981747-1-brian.ruley@gehealthcare.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: Russell King (Oracle) On Thu, Apr 09, 2026 at 06:17:36PM +0300, Brian Ruley wrote: > However, in the case I describe, if VA_B is mapped immediately to pfn_q > after it been has unmapped and freed for VA_A, then it's quite possible > that the page is still indexed in the cache. True. > The hypothesis is that if > VA_A and VA_B land in the same I-cache set and VA_A old cache entry > still exists (tagged with pfn_q), then the CPU can fetch stale > instructions because the tag will match. That's one reason why we need > to invalidate the cache, but that will be skipped in the path: > > migrate_pages > migrate_pages_batch > migrate_folio_move > remove_migration_ptes > remove_migration_pte > set_pte_at > set_ptes > __sync_icache_dcache (skipped if !young) > set_pte_ext In this case, if the old PTE was marked !young, then the new PTE will have: pte = pte_mkold(pte); on it, which marks it !young. As you say, __sync_icache_dcache() will be skipped. While a PTE entry will be set for the kernel, the code in set_pte_ext() will *not* establish a hardware PTE entry. For the 2-level pte code: tst r1, #L_PTE_YOUNG @ <- results in Z being set tstne r1, #L_PTE_VALID @ <- not executed eorne r1, r1, #L_PTE_NONE @ <- not executed tstne r1, #L_PTE_NONE @ <- not executed moveq r3, #0 @ <- hardware PTE value ARM( str r3, [r0, #2048]! ) @ <- writes hardware PTE So, for a !young PTE, the hardware PTE entry is written as zero, which means accesses should fault, which will then cause the PTE to be marked young. For the 3-level case, the L_PTE_YOUNG bit corresponds with the AF bit in the PTE, and there aren't split Linux / hardware PTE entries. AF being clear should result in a page fault being generated for the kernel to handle making the PTE young. In both of these cases, set_ptes() will need to be called with the updated PTE which will now be marked young, and that will result in the I-cache being flushed. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!