Re: [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices

[Nicolin Chen <nicolinc@nvidia.com>]

On Tue, Mar 31, 2026 at 08:19:19AM +0000, Tian, Kevin wrote:
> > From: Nicolin Chen <nicolinc@nvidia.com>
> > Sent: Saturday, March 7, 2026 7:41 AM
> > 
> > Controlled by the IOMMU driver, ATS is usually enabled "on demand" when
> > a
> > device requests a translation service from its associated IOMMU HW running
> > on the channel of a given PASID. This is working even when a device has no
> > translation on its RID (i.e., the RID is IOMMU bypassed).
> 
> ATS is usually enabled "on demand" when a given PASID on the device
> is attached to an I/O page table. Above sounds like there will be a software
> action to enable ATS upon a device translation request.
> > +/*
> > + * CXL r4.0, sec 3.2.5.13 Memory Type on CXL.cache notes: to source
> > requests on
> > + * CXL.cache, devices need to get the Host Physical Address (HPA) from the
> > Host
> > + * by means of an ATS request on CXL.io.
> > + *
> > + * In other world, CXL.cache devices cannot access host physical memory
> > without
> > + * ATS.
> > + */
> 
> s/world/words/

I have updated commit messages and inline comments. Thanks all for
the reviews!

One question regarding VM case: if a device is ats_always_on, while
VM somehow doesn't set nested_domain->enable_ats. Should the kernel
at least spit a warning, given that it would surely fail the device?

Nicolin