From: Bjorn Andersson <andersson@kernel.org>
To: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Cc: Thomas Gleixner <tglx@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
cros-qcom-dts-watchers@chromium.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 04/35] irqchip/qcom-pdc: Replace pdc_version global with a function pointer
Date: Fri, 10 Apr 2026 21:43:10 -0500 [thread overview]
Message-ID: <adm0X2ybeG5McXVv@baldur> (raw)
In-Reply-To: <20260410184124.1068210-5-mukesh.ojha@oss.qualcomm.com>
On Sat, Apr 11, 2026 at 12:10:41AM +0530, Mukesh Ojha wrote:
> Now that the two enable paths are separate functions, replace the
> pdc_version global with a __pdc_enable_intr function pointer. The
> pointer is assigned once at probe time based on the version register,
> moving the version comparison out of the interrupt enable/disable hot
> path entirely.
That's what the patch does, but why?
>
> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
> ---
> drivers/irqchip/qcom-pdc.c | 13 +++----------
> 1 file changed, 3 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
> index 21e2b4b884ee..734576cdce0c 100644
> --- a/drivers/irqchip/qcom-pdc.c
> +++ b/drivers/irqchip/qcom-pdc.c
> @@ -51,7 +51,7 @@ static void __iomem *pdc_base;
> static void __iomem *pdc_prev_base;
> static struct pdc_pin_region *pdc_region;
> static int pdc_region_cnt;
> -static unsigned int pdc_version;
> +static void (*__pdc_enable_intr)(int pin_out, bool on);
> static bool pdc_x1e_quirk;
>
> static void pdc_base_reg_write(void __iomem *base, int reg, u32 i, u32 val)
> @@ -123,14 +123,6 @@ static void pdc_enable_intr_cfg(int pin_out, bool on)
> pdc_reg_write(IRQ_i_CFG, pin_out, enable);
> }
>
> -static void __pdc_enable_intr(int pin_out, bool on)
> -{
> - if (pdc_version < PDC_VERSION_3_2)
> - pdc_enable_intr_bank(pin_out, on);
> - else
> - pdc_enable_intr_cfg(pin_out, on);
This style is comfortable to read.
> -}
> -
> static void pdc_enable_intr(struct irq_data *d, bool on)
> {
> unsigned long flags;
> @@ -400,7 +392,8 @@ static int qcom_pdc_probe(struct platform_device *pdev, struct device_node *pare
> goto fail;
> }
>
> - pdc_version = pdc_reg_read(PDC_VERSION_REG, 0);
> + __pdc_enable_intr = (pdc_reg_read(PDC_VERSION_REG, 0) < PDC_VERSION_3_2) ?
> + pdc_enable_intr_bank : pdc_enable_intr_cfg;
This style is a mess.
Regards,
Bjorn
>
> parent_domain = irq_find_host(parent);
> if (!parent_domain) {
> --
> 2.53.0
>
next prev parent reply other threads:[~2026-04-11 2:43 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-10 18:40 [PATCH 00/35] irqchip/qcom-pdc: Clean up register mapping and DT descriptions Mukesh Ojha
2026-04-10 18:40 ` [PATCH 01/35] dt-bindings: qcom,pdc: Tighten reg to single APSS DRV region Mukesh Ojha
2026-04-10 18:40 ` [PATCH 02/35] irqchip/qcom-pdc: Split __pdc_enable_intr() into per-version helpers Mukesh Ojha
2026-04-10 18:40 ` [PATCH 03/35] irqchip/qcom-pdc: Tighten ioremap clamp to single DRV region size Mukesh Ojha
2026-04-10 18:40 ` [PATCH 04/35] irqchip/qcom-pdc: Replace pdc_version global with a function pointer Mukesh Ojha
2026-04-11 2:43 ` Bjorn Andersson [this message]
2026-04-11 6:23 ` Mukesh Ojha
2026-04-10 18:40 ` [PATCH 05/35] irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register fields Mukesh Ojha
2026-04-10 18:40 ` [PATCH 06/35] irqchip/qcom-pdc: Use FIELD_GET() to extract bank index and bit position Mukesh Ojha
2026-04-10 18:40 ` [PATCH 07/35] arm64: dts: qcom: sdm845: Fix PDC reg size to single APSS DRV region Mukesh Ojha
2026-04-10 18:40 ` [PATCH 08/35] arm64: dts: qcom: sdm670: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 09/35] arm64: dts: qcom: sc7180: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 10/35] arm64: dts: qcom: sc7280: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 11/35] arm64: dts: qcom: sc8180x: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 12/35] arm64: dts: qcom: sm8150: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 13/35] arm64: dts: qcom: sc8280xp: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 14/35] arm64: dts: qcom: sm8250: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 15/35] arm64: dts: qcom: sm8350: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 16/35] arm64: dts: qcom: sm8450: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 17/35] arm64: dts: qcom: sm8550: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 18/35] arm64: dts: qcom: sm8650: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 19/35] arm64: dts: qcom: sm4450: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 20/35] arm64: dts: qcom: x1e80100: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 21/35] arm64: dts: qcom: sm6350: " Mukesh Ojha
2026-04-10 18:40 ` [PATCH 22/35] arm64: dts: qcom: sar2130p: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 23/35] arm64: dts: qcom: qcs615: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 24/35] arm64: dts: qcom: qcs8300: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 25/35] arm64: dts: qcom: sa8775p: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 26/35] arm64: dts: qcom: sdx75: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 27/35] arm64: dts: qcom: milos: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 28/35] arm64: dts: qcom: qdu1000: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 29/35] arm64: dts: qcom: kaanapali: Drop unused second PDC reg entry Mukesh Ojha
2026-04-10 18:41 ` [PATCH 30/35] arm64: dts: qcom: lemans: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 31/35] arm64: dts: qcom: milos: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 32/35] arm64: dts: qcom: monaco: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 33/35] arm64: dts: qcom: sc8280xp: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 34/35] arm64: dts: qcom: sdx75: " Mukesh Ojha
2026-04-10 18:41 ` [PATCH 35/35] arm64: dts: qcom: talos: " Mukesh Ojha
2026-04-11 2:48 ` [PATCH 00/35] irqchip/qcom-pdc: Clean up register mapping and DT descriptions Bjorn Andersson
2026-04-11 6:55 ` Mukesh Ojha
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