[PATCH v4 06/10] iommu/arm-smmu-v3: Introduce INV_TYPE_S2_VMID_VSMMU

Nicolin Chen
2026-03-19T19:52:36Z

A VMID held by a vSMMU is required to setup hardware (e.g. tegra241-cmdqv)
during its initialization. So, it should be allocated in the ->viommu_init
callback. This makes the VMID lifecycle unique than a VMID allocated for a
naked S2 attachment.

Introduce an INV_TYPE_S2_VMID_VSMMU to prepare for this case.

In arm_smmu_alloc_iotlb_tag(), retrieve the preallocated VMID on the vSMMU
directly instead of allocating a new one.

In arm_smmu_find_iotlb_tag(), continue searching in the smmu_domain->invs,
using the type INV_TYPE_S2_VMID_VSMMU. This means a second device attached
to a nested domain associated with the same vSMMU instance shall reuse the
VMID held by the vSMMU. (FWIW, device attached to a nesting parent domain
will have an INV_TYPE_S2_VMID and will not resue the VMID on any vSMMU.)

Suggested-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 12 +++++++++++-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 +++++++++++++++---
2 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 385dc76bc1b9f..c722df9b21982 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -655,6 +655,7 @@ struct arm_smmu_cmdq_batch {
enum arm_smmu_inv_type {
INV_TYPE_S1_ASID,
INV_TYPE_S2_VMID,
+ INV_TYPE_S2_VMID_VSMMU,
INV_TYPE_S2_VMID_S1_CLEAR,
INV_TYPE_ATS,
INV_TYPE_ATS_FULL,
@@ -676,7 +677,9 @@ struct arm_smmu_inv {

static inline void arm_smmu_inv_assert_iotlb_tag(struct arm_smmu_inv *inv)
{
- WARN_ON(inv->type != INV_TYPE_S1_ASID && inv->type != INV_TYPE_S2_VMID);
+ WARN_ON(inv->type != INV_TYPE_S1_ASID &&
+ inv->type != INV_TYPE_S2_VMID &&
+ inv->type != INV_TYPE_S2_VMID_VSMMU);
}

static inline bool arm_smmu_inv_is_ats(const struct arm_smmu_inv *inv)
@@ -1195,6 +1198,13 @@ struct arm_vsmmu {
u16 vmid;
};

+static inline struct arm_vsmmu *to_vsmmu(struct iommu_domain *domain)
+{
+ if (domain->type == IOMMU_DOMAIN_NESTED)
+ return to_smmu_nested_domain(domain)->vsmmu;
+ return NULL;
+}
+
#if IS_ENABLED(CONFIG_ARM_SMMU_V3_IOMMUFD)
void *arm_smmu_hw_info(struct device *dev, u32 *length,
enum iommu_hw_info_type *type);
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index ca7628abef5bd..130b6442af37f 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -1987,7 +1987,8 @@ void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
u64 vtcr_val;
struct arm_smmu_device *smmu = master->smmu;

- WARN_ON(tag->type != INV_TYPE_S2_VMID);
+ WARN_ON(tag->type != INV_TYPE_S2_VMID &&
+ tag->type != INV_TYPE_S2_VMID_VSMMU);

memset(target, 0, sizeof(*target));
target->data[0] = cpu_to_le64(
@@ -2683,6 +2684,7 @@ static void __arm_smmu_domain_inv_range(struct arm_smmu_invs *invs,
granule);
break;
case INV_TYPE_S2_VMID:
+ case INV_TYPE_S2_VMID_VSMMU:
cmd.tlbi.vmid = cur->id;
cmd.tlbi.leaf = leaf;
arm_smmu_inv_to_cmdq_batch(cur, &cmds, &cmd, iova, size,
@@ -3246,7 +3248,10 @@ int arm_smmu_find_iotlb_tag(struct iommu_domain *domain,
tag->type = INV_TYPE_S1_ASID;
break;
case ARM_SMMU_DOMAIN_S2:
- tag->type = INV_TYPE_S2_VMID;
+ if (to_vsmmu(domain))
+ tag->type = INV_TYPE_S2_VMID_VSMMU;
+ else
+ tag->type = INV_TYPE_S2_VMID;
break;
default:
return -EINVAL;
@@ -3270,6 +3275,12 @@ static int arm_smmu_alloc_iotlb_tag(struct iommu_domain *domain,
if (!ret || ret != -ENOENT)
return ret;

+ if (tag->type == INV_TYPE_S2_VMID_VSMMU) {
+ /* Use the pre-allocated VMID from vSMMU */
+ tag->id = to_vsmmu(domain)->vmid;
+ return 0;
+ }
+
/* FIXME replace with an actual allocation from the bitmap */
if (tag->type == INV_TYPE_S1_ASID)
tag->id = smmu_domain->cd.asid;
@@ -3313,6 +3324,7 @@ arm_smmu_master_build_inv(struct arm_smmu_master *master,
}
break;
case INV_TYPE_S2_VMID:
+ case INV_TYPE_S2_VMID_VSMMU:
cur->size_opcode = CMDQ_OP_TLBI_S2_IPA;
cur->nsize_opcode = CMDQ_OP_TLBI_S12_VMALL;
break;
@@ -3357,7 +3369,7 @@ arm_smmu_master_build_invs(struct arm_smmu_master *master, bool ats_enabled,
return NULL;

/* All the nested S1 ASIDs have to be flushed when S2 parent changes */
- if (nesting) {
+ if (tag->type == INV_TYPE_S2_VMID_VSMMU) {
if (!arm_smmu_master_build_inv(master,
INV_TYPE_S2_VMID_S1_CLEAR,
tag->id, IOMMU_NO_PASID, 0))
--
2.43.0