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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-50e39449e36sm338531351cf.21.2026.04.27.08.23.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Apr 2026 08:23:22 -0700 (PDT) Date: Mon, 27 Apr 2026 11:23:21 -0400 From: Brian Masney To: Prabhakar Cc: Michael Turquette , Stephen Boyd , Geert Uytterhoeven , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Fabrizio Castro , Lad Prabhakar Subject: Re: [PATCH v4 1/2] clk: divider: Add KUnit tests for clk_divider_bestdiv() ULONG_MAX handling Message-ID: References: <20260427112824.231150-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20260427112824.231150-2-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260427112824.231150-2-prabhakar.mahadev-lad.rj@bp.renesas.com> User-Agent: Mutt/2.3.1 (2026-03-20) Hi Lad, On Mon, Apr 27, 2026 at 12:28:23PM +0100, Prabhakar wrote: > From: Lad Prabhakar > > Add KUnit tests to verify the behaviour of clk_divider_bestdiv() when > clk_round_rate() is called with ULONG_MAX, which is the canonical way > to probe the maximum rate a clock can produce. > > Two test cases are introduced: > > - clk_divider_bestdiv_ulong_max_returns_max_rate: registers a 1 GHz > fixed-rate parent driving a table-based divider whose smallest entry > is div=2 (entries: 2, 4, 8). Calls clk_hw_round_rate(div_hw, ULONG_MAX) > and checks the result. > > - clk_divider_bestdiv_mux_ulong_max_returns_max_rate: places a two-input > mux (4 GHz and 2 GHz fixed-rate parents, CLK_SET_RATE_PARENT) ahead of > the same table-based divider to verify correct parent selection under > ULONG_MAX. > > Both tests use an explicit clk_div_table with a minimum divider of 2 so > that the pre-loop maxdiv clamping in clk_divider_bestdiv(): > > maxdiv = min(ULONG_MAX / rate, maxdiv); > > clamps maxdiv to 1, causing _next_div() to return 2 on the first > iteration and skip the loop body entirely. This makes bestdiv fall back > to the maximum divider, returning the minimum rate rather than the > maximum. > > The expected values intentionally reflect the buggy output: > - test 1: PARENT_RATE_1GHZ / 8 (minimum rate, not maximum) > - test 2: 0 (invalid, loop never populated bestdiv) > > These will be corrected to PARENT_RATE_1GHZ / 2 and PARENT_RATE_4GHZ / 2 > respectively once the fix to clk_divider_bestdiv() is applied. > > Signed-off-by: Lad Prabhakar [snip] > + KUNIT_ASSERT_EQ(test, 0, > + kunit_add_action_or_reset(test, > + (kunit_action_t *)clk_hw_unregister_fixed_rate, > + parent_hw)); You can use KUNIT_DEFINE_ACTION_WRAPPER() to avoid that cast. There's some examples in drivers/clk/clk_kunit_helpers.c. With that fixed: Reviewed-by: Brian Masney