From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BFD7B332ED3 for ; Tue, 21 Apr 2026 09:06:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776762387; cv=none; b=gWgXXw/32s3P4XB3yj03KMvUMtf1tnaOVYtsplflYOsX6IX2Z4KvJgyG7v80hgtYi+z9Bcu/YoKXHup5grRZ39MQ9aLA4OC3oY66FH2A9PZtfOQqEKdY1oDAQfwfbRFWL8YOmR3ktgyJZqEm9t4b9qYP09M+7KqmVEgDpzdD9Hg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776762387; c=relaxed/simple; bh=6JWVG2kXroh0p5jTbyqcaGxWiX732Fy02q4pZL3zcYc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Iotz451LV0VNDrl6xo2SNr55oqySAsUGhkP7TQa4tw2qyy5Sd/4nYJVNTYg5ZbtRbCSO0tyD95agLe+XSQuOxS2cCX5HVK5YBJk/wWH6AnVWiGpGolo5UsA6MfSlKVRjFIiV7OkViNET08uwrZOUGKIn1cY1ZJyCRHEHnXOod4w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=sbAAHBFj; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="sbAAHBFj" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 863F625E0; Tue, 21 Apr 2026 02:06:19 -0700 (PDT) Received: from e129823.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A73883F641; Tue, 21 Apr 2026 02:06:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1776762385; bh=6JWVG2kXroh0p5jTbyqcaGxWiX732Fy02q4pZL3zcYc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=sbAAHBFj1JBYrxIYu5XHjhREJnlD/Q+zoJ7IolaiRvJATZbTNOGlZeN747MJmIVTz XMDCgjZG523yf/ZoSjiyc3Ka2YOtcI5xU+/0kT43Ci3mSaYysp8dD66LC4OkEnDnaY sGrmZcG5SwfwuRW+C+Aa48Kaz9FHtb2L+8oQ21DU= Date: Tue, 21 Apr 2026 10:06:21 +0100 From: Yeoreum Yun To: Suzuki K Poulose Cc: Leo Yan , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v5 04/12] coresight: etm4x: exclude ss_status from drvdata->config Message-ID: References: <20260415165528.3369607-1-yeoreum.yun@arm.com> <20260415165528.3369607-5-yeoreum.yun@arm.com> <20260416155118.GM356832@e132581.arm.com> <57dbea1b-670b-4b8f-a590-1d4239bc2c76@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <57dbea1b-670b-4b8f-a590-1d4239bc2c76@arm.com> Hi Suzuki, > On 16/04/2026 16:51, Leo Yan wrote: > > On Wed, Apr 15, 2026 at 05:55:20PM +0100, Yeoreum Yun wrote: > > > > [...] > > > > > @@ -573,11 +573,9 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) > > > etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i)); > > > for (i = 0; i < caps->nr_ss_cmp; i++) { > > > - /* always clear status bit on restart if using single-shot */ > > > - if (config->ss_ctrl[i] || config->ss_pe_cmp[i]) > > > - config->ss_status[i] &= ~TRCSSCSRn_STATUS; > > > etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i)); > > > - etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i)); > > > + /* always clear status and pending bits on restart if using single-shot */ > > > + etm4x_relaxed_write32(csa, 0x0, TRCSSCSRn(i)); > > > > In Arm ARM, D24.4.60 TRCSSCSR, bits[0..3] are RO. I think it is > > fine for directly clear the regiser with zero (means it will only > > clear status / pending bits). > > > > [...] > > > > > @@ -1841,10 +1839,11 @@ static ssize_t sshot_status_show(struct device *dev, > > > { > > > unsigned long val; > > > struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); > > > + const struct etmv4_caps *caps = &drvdata->caps; > > > struct etmv4_config *config = &drvdata->config; > > > raw_spin_lock(&drvdata->spinlock); > > > - val = config->ss_status[config->ss_idx]; > > > + val = caps->ss_cmp[config->ss_idx]; > > > raw_spin_unlock(&drvdata->spinlock); > > > return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); > > > } > > > > This sysfs knob never can print out a realtime status for sshot, I am > > Won't it give the status, when the ETM was disabled (and saved back to > config), for as sysfs mode operation, where the user collects > information about the status via sysfs ? ( The question of if someone > actually makes use of this is a different question ) But I'm asking whether it's meaningful to give information for PENDING and STATUS after "seesion" is disabled. As you said, it gives a status after *disabled*. However, Is this information meaningful and user can something with these information? TBH I don't think so it would be better to remove from config... If this's required ... might be we need to move ss_status into etm4_drvdata directly anyway.. (ss_status). -- Sincerely, Yeoreum Yun