From: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
To: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
"James E.J. Bottomley" <James.Bottomley@hansenpartnership.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
Harshal Dev <harshal.dev@oss.qualcomm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-scsi@vger.kernel.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v8 5/5] arm64: dts: qcom: monaco: Add OPP-table for ICE UFS and ICE eMMC nodes
Date: Tue, 21 Apr 2026 11:20:34 +0530 [thread overview]
Message-ID: <aecQKiWBMHBYMt83@hu-arakshit-hyd.qualcomm.com> (raw)
In-Reply-To: <71c6c453-4a6b-414e-a039-80f36e948489@oss.qualcomm.com>
On Fri, Apr 10, 2026 at 04:27:35PM +0530, Kuldeep Singh wrote:
>
>
> On 4/9/2026 5:14 PM, Abhinaba Rakshit wrote:
> > Qualcomm Inline Crypto Engine (ICE) platform driver now, supports
> > an optional OPP-table.
> >
> > Add OPP-table for ICE UFS and ICE eMMC device nodes for Monaco
> > platform.
> >
> > Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/monaco.dtsi | 32 ++++++++++++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> > index 487bb682ae8620b819f022162edd11023ed07be8..cb0e554e94d237b0adccb55fa9ed967bae9eea05 100644
> > --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> > @@ -2730,6 +2730,22 @@ ice: crypto@1d88000 {
> > clock-names = "core",
> > "iface";
> > power-domains = <&gcc GCC_UFS_PHY_GDSC>;
> > +
> > + operating-points-v2 = <&ice_opp_table>;
> > +
> > + ice_opp_table: opp-table {
> > + compatible = "operating-points-v2";
> > +
>
> 75MHz is supported too. Please add that entry.
Sure, will add the entry in the next patchset.
Abhinaba Rakshit
prev parent reply other threads:[~2026-04-21 5:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-09 11:44 [PATCH v8 0/5] Enable ICE clock scaling Abhinaba Rakshit
2026-04-09 11:44 ` [PATCH v8 1/5] soc: qcom: ice: Add OPP-based clock scaling support for ICE Abhinaba Rakshit
2026-04-17 13:25 ` Harshal Dev
2026-04-21 6:06 ` Abhinaba Rakshit
2026-04-09 11:44 ` [PATCH v8 2/5] ufs: host: Add ICE clock scaling during UFS clock changes Abhinaba Rakshit
2026-04-17 13:32 ` Harshal Dev
2026-04-09 11:44 ` [PATCH v8 3/5] mmc: sdhci-msm: Set ICE clk to TURBO at sdhci ICE init Abhinaba Rakshit
2026-04-17 13:29 ` Harshal Dev
2026-04-21 6:10 ` Abhinaba Rakshit
2026-04-09 11:44 ` [PATCH v8 4/5] arm64: dts: qcom: kodiak: Add OPP-table for ICE UFS and ICE eMMC nodes Abhinaba Rakshit
2026-04-10 10:53 ` Kuldeep Singh
2026-04-21 5:58 ` Abhinaba Rakshit
2026-04-09 11:44 ` [PATCH v8 5/5] arm64: dts: qcom: monaco: " Abhinaba Rakshit
2026-04-10 10:57 ` Kuldeep Singh
2026-04-21 5:50 ` Abhinaba Rakshit [this message]
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