From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8E3C039A072 for ; Tue, 21 Apr 2026 09:48:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776764906; cv=none; b=FXKJ7/TP6A0+NolKz2EWt2GDuGPek2zqDLSH0/uwVQM0ogFzjrJOVuTujRJoWYQKqBm0GgNr0oY3tvynzZRWkD0QHYL+BrN4jQ00tJOJQFWdJDS2M5xWehEjslfgLdJmfGQpPGvFwdfKqkdi+l5LG5KXUuqwdgKi5h9qFI21PtQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776764906; c=relaxed/simple; bh=qE2+4kaBbTNPJvtb/mGE2xnzlgcKXz3scid3Ytm6884=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Y/C64rslcKnFa/QmcgmBwE1HyPzWyFS4qXyPZTAASQblN0LR0pmAMiRWrIU1Zd/zBQZ6fWsalxzx57J17an5dJSJXcN1JwxDzjooN3ogP3f/n80qq3hFyZ9LOurc5M0IDpsozENhOrM0sQ3DXcCssibHqDXrGxytUZxsX8JxBsY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=d4+PA36g; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="d4+PA36g" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2F1AC26A4; Tue, 21 Apr 2026 02:48:19 -0700 (PDT) Received: from e129823.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 14A783FBCB; Tue, 21 Apr 2026 02:48:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1776764904; bh=qE2+4kaBbTNPJvtb/mGE2xnzlgcKXz3scid3Ytm6884=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=d4+PA36gui3WIPus546arAP5ZBBKx3O6Kod1/X2wa388i6goFGiC6rV2CrViGz/UN JY7hreDBBR2LN2s8/kS6/is6uC5U2bAHDULbuWKgQ30gdPKEJbwi2f+0gCPXiCk34a bfqZuTRpqIljDoJMAz2vSGfoxDj02P9q4KqaZHb4= Date: Tue, 21 Apr 2026 10:48:20 +0100 From: Yeoreum Yun To: Suzuki K Poulose Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, leo.yan@arm.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v5 01/12] coresight: etm4x: fix wrong check of etm4x_sspcicrn_present() Message-ID: References: <20260415165528.3369607-1-yeoreum.yun@arm.com> <20260415165528.3369607-2-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Apr 21, 2026 at 09:47:54AM +0100, Suzuki K Poulose wrote: > On 15/04/2026 17:55, Yeoreum Yun wrote: > > According to Embedded Trace Macrocell Architecture Specification > > ETMv4.0 to ETM4.6 [0], TRCSSPCICR is present only if all of > > the following are true: > > > > - TRCIDR4.NUMSSCC > n. > > - TRCIDR4.NUMPC > 0b0000. > > - TRCSSCSR.PC == 0b1. > > > > Comment for etm4x_sspcicrn_present() is align with the specification. > > However, the check should use drvdata->nr_pe_cmp to check TRCIDR4.NUMPC > > not nr_pe. > > > > Link: https://developer.arm.com/documentation/ihi0064/latest/ [0] > > Fixes: f6a18f354c58 ("coresight: etm4x: Handle access to TRCSSPCICRn") > > With that looks good to me Thanks! > > Suzuki > > > Signed-off-by: Yeoreum Yun > > --- > > drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > > index d565a73f0042..74b7063d130e 100644 > > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > > @@ -89,7 +89,7 @@ static int etm4_probe_cpu(unsigned int cpu); > > static bool etm4x_sspcicrn_present(struct etmv4_drvdata *drvdata, int n) > > { > > return (n < drvdata->nr_ss_cmp) && > > - drvdata->nr_pe && > > + drvdata->nr_pe_cmp && > > (drvdata->config.ss_status[n] & TRCSSCSRn_PC); > > } > -- Sincerely, Yeoreum Yun