From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Eranian Stephane <eranian@google.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>,
kernel test robot <oliver.sang@intel.com>
Subject: Re: [Patch v3 3/7] perf/x86: Check if cpuc->events[*] pointer exists before accessing it
Date: Wed, 20 Aug 2025 13:33:28 +0800 [thread overview]
Message-ID: <aedbcbb5-f0b4-4bf6-bc33-c8c3bf3f20bc@linux.intel.com> (raw)
In-Reply-To: <aKVD4ATXW4LmhDJm@tassilo>
On 8/20/2025 11:41 AM, Andi Kleen wrote:
>> event = cpuc->events[bit];
>> + /*
>> + * perf_event_overflow() called by below __intel_pmu_pebs_last_event()
>> + * could trigger interrupt throttle and clear all event pointers of the
>> + * group in cpuc->events[] to NULL. So need to re-check if cpuc->events[*]
>> + * is NULL, if so it indicates the event has been throttled (stopped) and
>> + * the corresponding last PEBS records have been processed in stopping
>> + * event, don't need to process it again.
>> + */
>> + if (!event)
>> + continue;
> Then we silently ignore the overflow. Would be better to log at least an overflow
> packet or something like that.
Andi, I didn't fully get the exact meaning about the "log" here. When
throttle is triggered, perf_event_throttle() has already called
perf_log_throttle() to log the throttle event although only for the group
leader. Is it enough?
>
> -Andi
>
next prev parent reply other threads:[~2025-08-20 5:33 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-20 2:30 [Patch v3 0/7] x86 perf bug fixes and optimization Dapeng Mi
2025-08-20 2:30 ` [Patch v3 1/7] perf/x86/intel: Use early_initcall() to hook bts_init() Dapeng Mi
2025-08-25 10:24 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2025-08-20 2:30 ` [Patch v3 2/7] perf/x86/intel: Fix IA32_PMC_x_CFG_B MSRs access error Dapeng Mi
2025-08-25 10:24 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2025-08-20 2:30 ` [Patch v3 3/7] perf/x86: Check if cpuc->events[*] pointer exists before accessing it Dapeng Mi
2025-08-20 3:41 ` Andi Kleen
2025-08-20 5:33 ` Mi, Dapeng [this message]
2025-08-20 5:44 ` Andi Kleen
2025-08-20 5:54 ` Mi, Dapeng
2025-08-21 1:51 ` Andi Kleen
2025-08-21 13:35 ` Peter Zijlstra
2025-08-22 5:26 ` Mi, Dapeng
2025-08-26 3:47 ` Mi, Dapeng
2025-08-20 2:30 ` [Patch v3 4/7] perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag Dapeng Mi
2025-08-25 10:24 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2025-08-20 2:30 ` [Patch v3 5/7] perf/x86/intel: Change macro GLOBAL_CTRL_EN_PERF_METRICS to BIT_ULL(48) Dapeng Mi
2025-08-25 10:24 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2025-08-20 2:30 ` [Patch v3 6/7] perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into INTEL_FIXED_BITS_MASK Dapeng Mi
2025-08-25 10:24 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2025-08-20 2:30 ` [Patch v3 7/7] perf/x86: Print PMU counters bitmap in x86_pmu_show_pmu_cap() Dapeng Mi
2025-08-25 10:24 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2025-08-20 15:55 ` [Patch v3 0/7] x86 perf bug fixes and optimization Liang, Kan
2025-08-21 13:39 ` Peter Zijlstra
2025-08-22 5:29 ` Mi, Dapeng
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