From: Mark Rutland <mark.rutland@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Will Deacon <will@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Jonathan Corbet <corbet@lwn.net>, Shuah Khan <shuah@kernel.org>,
Oliver Upton <oupton@kernel.org>,
Dave Martin <Dave.Martin@arm.com>, Fuad Tabba <tabba@google.com>,
Ben Horgan <ben.horgan@arm.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
Peter Maydell <peter.maydell@linaro.org>,
Eric Auger <eric.auger@redhat.com>
Subject: Re: [PATCH v10 01/30] arm64/sysreg: Update SMIDR_EL1 to DDI0601 2025-06
Date: Fri, 8 May 2026 18:12:01 +0100 [thread overview]
Message-ID: <af4ZYVFsbYlEfdOu@J2N7QTR9R3> (raw)
In-Reply-To: <20260306-kvm-arm64-sme-v10-1-43f7683a0fb7@kernel.org>
On Fri, Mar 06, 2026 at 05:00:53PM +0000, Mark Brown wrote:
> Update the definition of SMIDR_EL1 in the sysreg definition to reflect the
> information in DD0601 2025-06. This includes somewhat more generic ways of
> describing the sharing of SMCUs, more information on supported priorities
> and provides additional resolution for describing affinity groups.
FWIW, these are all in ARM DDI 0487 M.b:
https://developer.arm.com/documentation/ddi0487/mb/
Is anything later in the series going to depend on these fields, or
would everything behave correctly with the existing RES0 field
definitions?
> Reviewed-by: Fuad Tabba <tabba@google.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/tools/sysreg | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 9d1c21108057..b6586accf344 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -3655,11 +3655,15 @@ Field 3:0 BS
> EndSysreg
>
> Sysreg SMIDR_EL1 3 1 0 0 6
> -Res0 63:32
> +Res0 63:60
> +Field 59:56 NSMC
> +Field 55:52 HIP
Reading the ARM ARM, HIP is arguably a backwards-incompatible change.
Do we expect to expose that to VMs, or just hide priorities entirely? I
suspect we probably want to require that the guest sees
SMIDR_EL1.SMPS==0, and not care about any of that.
Mark.
> +Field 51:32 AFFINITY2
> Field 31:24 IMPLEMENTER
> Field 23:16 REVISION
> Field 15 SMPS
> -Res0 14:12
> +Field 14:13 SH
> +Res0 12
> Field 11:0 AFFINITY
> EndSysreg
>
>
> --
> 2.47.3
>
next parent reply other threads:[~2026-05-08 17:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260306-kvm-arm64-sme-v10-0-43f7683a0fb7@kernel.org>
[not found] ` <20260306-kvm-arm64-sme-v10-1-43f7683a0fb7@kernel.org>
2026-05-08 17:12 ` Mark Rutland [this message]
2026-05-09 0:43 ` [PATCH v10 01/30] arm64/sysreg: Update SMIDR_EL1 to DDI0601 2025-06 Mark Brown
2026-05-11 10:40 ` Mark Rutland
2026-05-11 12:31 ` Mark Brown
[not found] ` <20260306-kvm-arm64-sme-v10-15-43f7683a0fb7@kernel.org>
2026-05-08 17:20 ` [PATCH v10 15/30] KVM: arm64: Support SME control registers Mark Rutland
2026-05-11 14:17 ` Mark Brown
[not found] ` <20260306-kvm-arm64-sme-v10-4-43f7683a0fb7@kernel.org>
2026-05-11 10:32 ` [PATCH v10 04/30] arm64/fpsimd: Determine maximum virtualisable SME vector length Mark Rutland
2026-05-11 12:42 ` Mark Brown
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