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From: Yao Zi <me@ziyao.cc>
To: Xi Ruoyao <xry111@xry111.site>,
	Huacai Chen <chenhuacai@kernel.org>,
	WANG Xuerui <kernel@xen0n.name>
Cc: "Thomas Weißschuh" <linux@weissschuh.net>,
	loongarch@lists.linux.dev, "Zixing Liu" <liushuyu@aosc.io>,
	"Mingcong Bai" <jeffbai@aosc.io>, "Arnd Bergmann" <arnd@arndb.de>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"George Guo" <dongtai.guo@linux.dev>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] LoongArch: detect and disable sc.q if erratic
Date: Tue, 28 Apr 2026 18:47:40 +0000	[thread overview]
Message-ID: <afEAzG-k3MwazO8W@pie> (raw)
In-Reply-To: <20260409121936.871418-1-xry111@xry111.site>

On Thu, Apr 09, 2026 at 08:19:34PM +0800, Xi Ruoyao wrote:
> We've observed that, on some Loongson 2K3000/3B6000M systems with earlier
> firmware revisions, the sc.q instruction may write incorrect data into
> the upper half of the written 128-bit datum.
> 
> It seems upgrading the firmware (for example, the 202602 release from
> Loongson [1]) will resolve the issue. But since not all systems may be
> running the most up-to-date firmware, based on firmware update avail-
> ability and the environment in which they are running in.
> 
> To help with system compatibility and ensure correct behavior, check if
> sc.q behaves erratically and disable if so.
> 
> Link: https://github.com/loongson/Firmware/pull/156 [1]
> Signed-off-by: Xi Ruoyao <xry111@xry111.site>
> ---
>  arch/loongarch/kernel/cpu-probe.c | 39 ++++++++++++++++++++++++++++++-
>  1 file changed, 38 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-probe.c
> index 657bbae6c1c7..5fcf2672172f 100644
> --- a/arch/loongarch/kernel/cpu-probe.c
> +++ b/arch/loongarch/kernel/cpu-probe.c
> @@ -132,6 +132,43 @@ static void set_isa(struct cpuinfo_loongarch *c, unsigned int isa)
>  	}
>  }
>  
> +/*
> + * Some LoongArch has broken sc.q which incorrectly handles the upper word
> + * when the lower word is zero. Newer firmware versions (such as the 202602
> + * release from Loongson) seem to contain a workaround for this issue.
> + *
> + * Disable sc.q if erratic to ensure reliability and compatibility.
> + */
> +static bool sc_q_is_sane(void)
> +{
> +	struct {
> +		long word[2];
> +	} __aligned(16) mem;

Isn't this equivalent to

	long word[2] __aligned(16);

with which we could eliminate the outer structure?

And should we introduce Kconfig options like ARM64_ERRATUM_* (arm64) or
ERRATA_MIPS_P8700_PAUSE_OPCODE (RISC-V) to conditionally compile these
work arounds? This might not be an emergency, but might be useful when
there are more quirks like this coming in the future.

Otherwise this patch looks good to me,

Reviewed-by: Yao Zi <me@ziyao.cc>

Regards,
Yao Zi

      parent reply	other threads:[~2026-04-28 18:48 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-09 12:19 [PATCH v2] LoongArch: detect and disable sc.q if erratic Xi Ruoyao
2026-04-27  2:17 ` Ping: " Xi Ruoyao
2026-04-27  8:43   ` Huacai Chen
2026-04-28 15:49     ` Xi Ruoyao
2026-04-29  2:13       ` Huacai Chen
2026-04-28 18:47 ` Yao Zi [this message]

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