From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5DCB035F180 for ; Wed, 29 Apr 2026 12:29:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777465762; cv=none; b=UYhEKhtINBzBt5lxG4RFs6WrY4yBEvlOLMTv1upIpYFnSzxejVo6AWybuCiuFXoyxhCZ5c6dEJsk/ZeDT1ajtaaClFH/50cpRLSTXLTuECzDlFXJXCSD107aoUqK/rxOvmRaUiAnbvEQpg5wceMGMpz9PM7bXzkoxlrh1jx3r7w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777465762; c=relaxed/simple; bh=dPXWKsyfDbSfXYr+w3ukUCn5uBHKawsKXgfUBUuDLyo=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=LHUFBbRabAfshSMEHcM903uL5OMTWPezeO1RQDjBxEP1498iX6VEL62s12ckn4M+YiDrnDyhzyRgNBeGnL+W0R4BWSWQevIUuFhRTzXn0X8FmVJIXs57cw3hcxi90uyFqFar/535WNKR4LqEqtnd0KRIl+SG5wHXE1nrDEOVUWg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=l80kQ4HY; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="l80kQ4HY" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 11BC22A68 for ; Wed, 29 Apr 2026 05:29:14 -0700 (PDT) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 511B13F763 for ; Wed, 29 Apr 2026 05:29:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1777465759; bh=dPXWKsyfDbSfXYr+w3ukUCn5uBHKawsKXgfUBUuDLyo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=l80kQ4HY6K0xFFBFzplFIJtAUaJ8VCt4bdxiMwBhzyQKrD+LzbOiipLbTEFvRC9tk XFr5O3WUQas2NcY6H9reqhL9rQ8g55q1XHUVHogQ9EW4aDGnf0iBQ4f058nWCYEUD+ yTPMbddjVXAEGXF8RPKUhR7a4Uk22YXHnP/od76s= Date: Wed, 29 Apr 2026 13:29:10 +0100 From: Liviu Dudau To: Boris Brezillon Cc: Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/10] drm/panthor: Make panthor_irq::state a non-atomic field Message-ID: References: <20260429-panthor-signal-from-irq-v1-0-4b92ae4142d2@collabora.com> <20260429-panthor-signal-from-irq-v1-1-4b92ae4142d2@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260429-panthor-signal-from-irq-v1-1-4b92ae4142d2@collabora.com> On Wed, Apr 29, 2026 at 11:38:28AM +0200, Boris Brezillon wrote: > The only place where panthor_irq::state is accessed without > panthor_irq::mask_lock held is in the prologue of _irq_suspend(), > which is not really a fast-path. So let's simplify things by assuming > panthor_irq::state must always be accessed with the mask_lock held, > and add a scoped_guard() in _irq_suspend(). > > Signed-off-by: Boris Brezillon Reviewed-by: Liviu Dudau Best regards, Liviu > --- > drivers/gpu/drm/panthor/panthor_device.h | 35 ++++++++++++++++---------------- > 1 file changed, 17 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h > index 4e4607bca7cc..3f91ba73829d 100644 > --- a/drivers/gpu/drm/panthor/panthor_device.h > +++ b/drivers/gpu/drm/panthor/panthor_device.h > @@ -101,8 +101,12 @@ struct panthor_irq { > */ > spinlock_t mask_lock; > > - /** @state: one of &enum panthor_irq_state reflecting the current state. */ > - atomic_t state; > + /** > + * @state: one of &enum panthor_irq_state reflecting the current state. > + * > + * Must be accessed with mask_lock held. > + */ > + enum panthor_irq_state state; > }; > > /** > @@ -510,18 +514,15 @@ const char *panthor_exception_name(struct panthor_device *ptdev, > static irqreturn_t panthor_ ## __name ## _irq_raw_handler(int irq, void *data) \ > { \ > struct panthor_irq *pirq = data; \ > - enum panthor_irq_state old_state; \ > \ > if (!gpu_read(pirq->iomem, INT_STAT)) \ > return IRQ_NONE; \ > \ > guard(spinlock_irqsave)(&pirq->mask_lock); \ > - old_state = atomic_cmpxchg(&pirq->state, \ > - PANTHOR_IRQ_STATE_ACTIVE, \ > - PANTHOR_IRQ_STATE_PROCESSING); \ > - if (old_state != PANTHOR_IRQ_STATE_ACTIVE) \ > + if (pirq->state != PANTHOR_IRQ_STATE_ACTIVE) \ > return IRQ_NONE; \ > \ > + pirq->state = PANTHOR_IRQ_STATE_PROCESSING; \ > gpu_write(pirq->iomem, INT_MASK, 0); \ > return IRQ_WAKE_THREAD; \ > } \ > @@ -551,13 +552,10 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da > } \ > \ > scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ > - enum panthor_irq_state old_state; \ > - \ > - old_state = atomic_cmpxchg(&pirq->state, \ > - PANTHOR_IRQ_STATE_PROCESSING, \ > - PANTHOR_IRQ_STATE_ACTIVE); \ > - if (old_state == PANTHOR_IRQ_STATE_PROCESSING) \ > + if (pirq->state == PANTHOR_IRQ_STATE_PROCESSING) { \ > + pirq->state = PANTHOR_IRQ_STATE_ACTIVE; \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > + } \ > } \ > \ > return ret; \ > @@ -566,18 +564,19 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da > static inline void panthor_ ## __name ## _irq_suspend(struct panthor_irq *pirq) \ > { \ > scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ > - atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDING); \ > + pirq->state = PANTHOR_IRQ_STATE_SUSPENDING; \ > gpu_write(pirq->iomem, INT_MASK, 0); \ > } \ > synchronize_irq(pirq->irq); \ > - atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDED); \ > + scoped_guard(spinlock_irqsave, &pirq->mask_lock) \ > + pirq->state = PANTHOR_IRQ_STATE_SUSPENDED; \ > } \ > \ > static inline void panthor_ ## __name ## _irq_resume(struct panthor_irq *pirq) \ > { \ > guard(spinlock_irqsave)(&pirq->mask_lock); \ > \ > - atomic_set(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE); \ > + pirq->state = PANTHOR_IRQ_STATE_ACTIVE; \ > gpu_write(pirq->iomem, INT_CLEAR, pirq->mask); \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > } \ > @@ -610,7 +609,7 @@ static inline void panthor_ ## __name ## _irq_enable_events(struct panthor_irq * > * on the PROCESSING -> ACTIVE transition. \ > * If the IRQ is suspended/suspending, the mask is restored at resume time. \ > */ \ > - if (atomic_read(&pirq->state) == PANTHOR_IRQ_STATE_ACTIVE) \ > + if (pirq->state == PANTHOR_IRQ_STATE_ACTIVE) \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > } \ > \ > @@ -624,7 +623,7 @@ static inline void panthor_ ## __name ## _irq_disable_events(struct panthor_irq > * on the PROCESSING -> ACTIVE transition. \ > * If the IRQ is suspended/suspending, the mask is restored at resume time. \ > */ \ > - if (atomic_read(&pirq->state) == PANTHOR_IRQ_STATE_ACTIVE) \ > + if (pirq->state == PANTHOR_IRQ_STATE_ACTIVE) \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > } > > > -- > 2.53.0 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯