From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 80C3A3FE646 for ; Wed, 29 Apr 2026 13:34:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777469642; cv=none; b=aBIE3iPgBXXkoIKCb1XRm7EZgDeu0w3FX4KbF9ck0r3BxlZBJguI4o7152tT14X667m8y9v3Dh+/pMmIC3XaL0u9zM4dReJ35FT1HfUq3VGHy3m3voAs6eZzp8t4q3O2TveU/S4bf2T5oyZnbkp27fGiMujpjp1bxEZOi4xQ6KY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777469642; c=relaxed/simple; bh=5te7r2BHOvYm4RuayRqfKSycIm9FG1qfCbfy8BvsfgU=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=lOmja1o78lfQRHiufO4YwpbEtvCVvDdOyQKwBgLIRXFDz1595K+BfkDcUGCNgBT5PdG1WVy1a2C1STuSu0Yz8VZ5EjMJ+dAR6uFPbee35/Y2zO806JgnnUkhlGma6ZmzAKqv18nyx8mLjF4OGh0aJ4ha3+7UDTqT0jCqqZSUgtI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=dzSwgUxq; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="dzSwgUxq" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2B6772574 for ; Wed, 29 Apr 2026 06:33:54 -0700 (PDT) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 69D363F62B for ; Wed, 29 Apr 2026 06:33:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1777469639; bh=5te7r2BHOvYm4RuayRqfKSycIm9FG1qfCbfy8BvsfgU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=dzSwgUxq+cAJxV2R2gXY6IJCKhYHEBCNLafHJkGRFatejWm5HN9jAQDQLHqguBc60 VikAC4GkI/uJbMp57B6VFqInKeGTe86hV6XdgO8+d3atMkfp6Pul7/nGCdEl42/RmR 2lPKIPQa+qEh9bbKvY39FTMinpuvEqJFz7amYuRU= Date: Wed, 29 Apr 2026 14:33:50 +0100 From: Liviu Dudau To: Boris Brezillon Cc: Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 05/10] drm/panthor: Make panthor_fw_{update,toggle}_reqs() callable from IRQ context Message-ID: References: <20260429-panthor-signal-from-irq-v1-0-4b92ae4142d2@collabora.com> <20260429-panthor-signal-from-irq-v1-5-4b92ae4142d2@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260429-panthor-signal-from-irq-v1-5-4b92ae4142d2@collabora.com> On Wed, Apr 29, 2026 at 11:38:32AM +0200, Boris Brezillon wrote: > If we want some FW events to be processed in the interrupt path, we need > the helpers manipulating req regs to be IRQ-safe, which implies using > spin_lock_irqsave instead of spinlock. While at it, use guards instead > of plain spin_lock/unlock calls. > > Signed-off-by: Boris Brezillon Reviewed-by: Liviu Dudau Best regards, Liviu > --- > drivers/gpu/drm/panthor/panthor_fw.h | 9 +++------ > 1 file changed, 3 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_fw.h b/drivers/gpu/drm/panthor/panthor_fw.h > index a99a9b6f4825..e56b7fe15bb3 100644 > --- a/drivers/gpu/drm/panthor/panthor_fw.h > +++ b/drivers/gpu/drm/panthor/panthor_fw.h > @@ -432,12 +432,11 @@ struct panthor_fw_global_iface { > #define panthor_fw_toggle_reqs(__iface, __in_reg, __out_reg, __mask) \ > do { \ > u32 __cur_val, __new_val, __out_val; \ > - spin_lock(&(__iface)->lock); \ > + guard(spinlock_irqsave)(&(__iface)->lock); \ > __cur_val = READ_ONCE((__iface)->input->__in_reg); \ > __out_val = READ_ONCE((__iface)->output->__out_reg); \ > __new_val = ((__out_val ^ (__mask)) & (__mask)) | (__cur_val & ~(__mask)); \ > WRITE_ONCE((__iface)->input->__in_reg, __new_val); \ > - spin_unlock(&(__iface)->lock); \ > } while (0) > > /** > @@ -458,21 +457,19 @@ struct panthor_fw_global_iface { > #define panthor_fw_update_reqs(__iface, __in_reg, __val, __mask) \ > do { \ > u32 __cur_val, __new_val; \ > - spin_lock(&(__iface)->lock); \ > + guard(spinlock_irqsave)(&(__iface)->lock); \ > __cur_val = READ_ONCE((__iface)->input->__in_reg); \ > __new_val = (__cur_val & ~(__mask)) | ((__val) & (__mask)); \ > WRITE_ONCE((__iface)->input->__in_reg, __new_val); \ > - spin_unlock(&(__iface)->lock); \ > } while (0) > > #define panthor_fw_update_reqs64(__iface, __in_reg, __val, __mask) \ > do { \ > u64 __cur_val, __new_val; \ > - spin_lock(&(__iface)->lock); \ > + guard(spinlock_irqsave)(&(__iface)->lock); \ > __cur_val = READ_ONCE((__iface)->input->__in_reg); \ > __new_val = (__cur_val & ~(__mask)) | ((__val) & (__mask)); \ > WRITE_ONCE((__iface)->input->__in_reg, __new_val); \ > - spin_unlock(&(__iface)->lock); \ > } while (0) > > struct panthor_fw_global_iface * > > -- > 2.53.0 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯