Re: [PATCH rc v4 1/5] iommu/arm-smmu-v3: Add arm_smmu_kdump_adopt_strtab() for kdump

[Nicolin Chen <nicolinc@nvidia.com>]

On Wed, Apr 29, 2026 at 12:20:49AM -0700, Nicolin Chen wrote:

> +static int arm_smmu_kdump_adopt_strtab_2lvl(struct arm_smmu_device *smmu,
> +					    u32 cfg_reg, dma_addr_t dma)
[...]
> +	for (i = 0; i < num_l1_ents; i++) {
> +		u64 l2ptr = le64_to_cpu(cfg->l2.l1tab[i].l2ptr);

Sashiko pointed out a missing READ_ON here.

And in arm_smmu_is_attach_deferred() too.

I've made a small change to my local v5 tree:

@@ -4337,7 +4337,8 @@ static bool arm_smmu_is_attach_deferred(struct device *dev)
        for (i = 0; i < master->num_streams; i++) {
                struct arm_smmu_ste *ste =
                        arm_smmu_get_step_for_sid(smmu, master->streams[i].id);
-               u64 ent0 = le64_to_cpu(ste->data[0]);
+               /* Pairing READ_ONCE() with the WRITE_ONCE() in entry_set() */
+               u64 ent0 = le64_to_cpu(READ_ONCE(ste->data[0]));

                /* Defer only when there might be in-flight DMAs */
                if ((ent0 & STRTAB_STE_0_V) &&
@@ -4747,7 +4748,8 @@ static int arm_smmu_kdump_adopt_strtab_2lvl(struct arm_smmu_device *smmu,
                return -ENOMEM;

        for (i = 0; i < num_l1_ents; i++) {
-               u64 l2ptr = le64_to_cpu(cfg->l2.l1tab[i].l2ptr);
+               /* L1 entry is shared with the SMMU and possibly rogue DMA */
+               u64 l2ptr = le64_to_cpu(READ_ONCE(cfg->l2.l1tab[i].l2ptr));
                dma_addr_t l2_dma = l2ptr & STRTAB_L1_DESC_L2PTR_MASK;
                u32 span = FIELD_GET(STRTAB_L1_DESC_SPAN, l2ptr);

Given these are two small changes, they shouldn't block community
review. I will wait for a few days before finalizing/sending v5.

Thanks
Nicolin