From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932510AbdJJQ5g (ORCPT ); Tue, 10 Oct 2017 12:57:36 -0400 Received: from foss.arm.com ([217.140.101.70]:47584 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932075AbdJJQ5c (ORCPT ); Tue, 10 Oct 2017 12:57:32 -0400 Subject: Re: [PATCH v4 05/12] mmc: mediatek: add pad_tune0 support To: Chaotian Jing , Ulf Hansson Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Catalin Marinas , Linus Walleij , Will Deacon , linux-kernel@vger.kernel.org, yong mao , Phong LE , Rob Herring , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Matthias Brugger , linux-mmc@vger.kernel.org, Heiner Kallweit References: <1507627831-29323-1-git-send-email-chaotian.jing@mediatek.com> <1507627831-29323-6-git-send-email-chaotian.jing@mediatek.com> From: Julien Thierry Message-ID: Date: Tue, 10 Oct 2017 17:57:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <1507627831-29323-6-git-send-email-chaotian.jing@mediatek.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 10/10/17 10:30, Chaotian Jing wrote: > from mt2701, the register of PAD_TUNE has been phased out, > while there is a new register of PAD_TUNE0 > > Signed-off-by: Chaotian Jing > --- > drivers/mmc/host/mtk-sd.c | 69 ++++++++++++++++++++++++++++++++++------------- > 1 file changed, 51 insertions(+), 18 deletions(-) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index ab2fbbb..0dc45b3 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -75,6 +75,7 @@ > #define MSDC_PATCH_BIT 0xb0 > #define MSDC_PATCH_BIT1 0xb4 > #define MSDC_PAD_TUNE 0xec > +#define MSDC_PAD_TUNE0 0xf0 > #define PAD_DS_TUNE 0x188 > #define PAD_CMD_TUNE 0x18c > #define EMMC50_CFG0 0x208 > @@ -301,6 +302,7 @@ struct msdc_save_para { > struct mtk_mmc_compatible { > u8 clk_div_bits; > bool hs400_tune; /* only used for MT8173 */ > + bool pad_tune0; You only use this to decide whether to use MDSC_PAD_TUNE or MSDC_PAD_TUNE0 as tune regs. Couldn't this field directly be a 'u32' that is either MDSC_PAD_TUNE or MDSC_PAD_TUNE0 rather than a bool? > }; > > struct msdc_tune_para { > @@ -362,21 +364,25 @@ struct msdc_host { > static const struct mtk_mmc_compatible mt8135_compat = { > .clk_div_bits = 8, > .hs400_tune = false, > + .pad_tune0 = false, and here we could have (field could be renamed accordingly of course): .pad_tune0 = MDSC_PAD_TUNE, > }; > > static const struct mtk_mmc_compatible mt8173_compat = { > .clk_div_bits = 8, > .hs400_tune = true, > + .pad_tune0 = false, > }; > > static const struct mtk_mmc_compatible mt2701_compat = { > .clk_div_bits = 12, > .hs400_tune = false, > + .pad_tune0 = true, here: .pad_tune0 = MDSC_PAD_TUNE0, > }; > > static const struct mtk_mmc_compatible mt2712_compat = { > .clk_div_bits = 12, > .hs400_tune = false, > + .pad_tune0 = true, > }; > > static const struct of_device_id msdc_of_ids[] = { > @@ -581,6 +587,10 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) > u32 flags; > u32 div; > u32 sclk; > + u32 tune_reg = MSDC_PAD_TUNE; > + > + if (host->dev_comp->pad_tune0) > + tune_reg = MSDC_PAD_TUNE0; And this would not be needed here nor in the other functions, it could just be replaced by host->dev_comp->pad_tune0. Thanks, -- Julien Thierry