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Wed, 6 May 2026 11:05:06 +0000 Date: Wed, 6 May 2026 18:25:12 +0800 From: Yan Zhao To: Dave Hansen , , Thomas Gleixner , Ingo Molnar , "Borislav Petkov" , , Juergen Gross , Subject: Re: [PATCH v2 2/8] x86/msr: Consolidate rdmsr() definitions Message-ID: Reply-To: Yan Zhao References: <20260429184517.7E078510@davehans-spike.ostc.intel.com> <20260429184521.7AADEE4C@davehans-spike.ostc.intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: TP0P295CA0051.TWNP295.PROD.OUTLOOK.COM (2603:1096:910:3::10) To PH0PR11MB7472.namprd11.prod.outlook.com (2603:10b6:510:28c::12) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR11MB7472:EE_|LV8PR11MB8678:EE_ X-MS-Office365-Filtering-Correlation-Id: 9f12086b-dd1b-4e92-ec5a-08deab5f5489 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|22082099003|56012099003|18002099003; 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\ > > + (void)((low) = (u32)__val); \ > > + (void)((high) = (u32)(__val >> 32)); \ > > +} while (0) > Rather than direct all (paravirt and native) invocations of rdmsr() to > paravirt_*(), does it make sense to first introduce the common version of > helpers and direct the common version of helpers to paravirt_* or native_*? > So, we can have > > +/* > + * Common paravirt and native helpers: > + */ > +#define rdmsr(msr, low, high) \ > +do { \ > + u64 __val = common_read_msr((msr)); \ > + (void)((low) = (u32)__val); \ > + (void)((high) = (u32)(__val >> 32)); \ > +} while (0) > Or maybe s/common/trampoline ? > with below changes in patch 1. > > diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h > index 9c2ea29e12a9..7ba5bc921526 100644 > --- a/arch/x86/include/asm/msr.h > +++ b/arch/x86/include/asm/msr.h > @@ -171,8 +171,19 @@ static inline u64 native_read_pmc(int counter) > > #ifdef CONFIG_PARAVIRT_XXL > #include > +#define common_read_msr paravirt_read_msr > +#define common_read_msr_safe paravirt_read_msr_safe > +#define common_write_msr paravirt_write_msr > +#define common_write_msr_safe paravirt_write_msr_safe > #else > #include > + > +/* Short-circuit the paravirt MSR infrastructure when it is disabled: */ > +#define common_read_msr native_read_msr > +#define common_read_msr_safe native_read_msr_safe > +#define common_write_msr native_write_msr > +#define common_write_msr_safe native_write_msr_safe > + > > /* > * Access to machine-specific registers (available on 586 and better only) > * Note: the rd* operations modify the parameters directly (without using > @@ -181,35 +192,35 @@ static inline u64 native_read_pmc(int counter) > > #define rdmsr(msr, low, high) \ > do { \ > - u64 __val = native_read_msr((msr)); \ > + u64 __val = common_read_msr((msr)); \ > (void)((low) = (u32)__val); \ > (void)((high) = (u32)(__val >> 32)); \ > } while (0) > > static inline void wrmsr(u32 msr, u32 low, u32 high) > { > - native_write_msr(msr, (u64)high << 32 | low); > + common_write_msr(msr, (u64)high << 32 | low); > } > > #define rdmsrq(msr, val) \ > - ((val) = native_read_msr((msr))) > + ((val) = common_read_msr((msr))) > > static inline void wrmsrq(u32 msr, u64 val) > { > - native_write_msr(msr, val); > + common_write_msr(msr, val); > } > > /* wrmsr with exception handling */ > static inline int wrmsrq_safe(u32 msr, u64 val) > { > - return native_write_msr_safe(msr, val); > + return common_write_msr_safe(msr, val); > } > > /* rdmsr with exception handling */ > #define rdmsr_safe(msr, low, high) \ > ({ \ > u64 __val; \ > - int __err = native_read_msr_safe((msr), &__val); \ > + int __err = common_read_msr_safe((msr), &__val); \ > (*low) = (u32)__val; \ > (*high) = (u32)(__val >> 32); \ > __err; \ > @@ -217,7 +228,7 @@ static inline int wrmsrq_safe(u32 msr, u64 val) > > static inline int rdmsrq_safe(u32 msr, u64 *p) > { > - return native_read_msr_safe(msr, p); > + return common_read_msr_safe(msr, p); > } > > static __always_inline u64 rdpmc(int counter) > >