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[34.124.234.44]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8fc29a80069sm2298791985a.15.2026.05.07.12.52.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 12:52:56 -0700 (PDT) Date: Thu, 7 May 2026 19:52:49 +0000 From: Pranjal Shrivastava To: Yigit Oguz Cc: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, baolu.lu@linux.intel.com, dwmw2@infradead.org, suravee.suthikulpanit@amd.com, jgg@ziepe.ca, nicolinc@nvidia.com, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Lilit Janpoladyan Subject: Re: [PATCH 3/3] iommu/amd: Add vendor:device ID to AMD IOMMU event logs Message-ID: References: <20260506150541.60467-1-yigitogu@amazon.de> <20260506150541.60467-4-yigitogu@amazon.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260506150541.60467-4-yigitogu@amazon.de> On Wed, May 06, 2026 at 03:05:39PM +0000, Yigit Oguz wrote: > Add amd_iommu_devid_str() helper that formats PCI device identity as > SSSS:BB:DD.F VVVV:DDDD by looking up the pci_dev via > pci_get_domain_bus_and_slot. Falls back to SSSS:BB:DD.F when the > device is not found. > > Before: > AMD-Vi: Event logged [IO_PAGE_FAULT device=0000:41:00.0 domain=0x000a > address=0xe0000000 flags=0x0020] > > After: > AMD-Vi: Event logged [IO_PAGE_FAULT device=0000:41:00.0 8086:1533 domain=0x000a > address=0xe0000000 flags=0x0020] > > Signed-off-by: Yigit Oguz > Signed-off-by: Lilit Janpoladyan > Assisted-by: Claude:claude-4.6-opus > --- > drivers/iommu/amd/iommu.c | 94 ++++++++++++++++++++++++--------------- > 1 file changed, 58 insertions(+), 36 deletions(-) > > diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c > index 01171361f9bc..441b4a7e85d5 100644 > --- a/drivers/iommu/amd/iommu.c > +++ b/drivers/iommu/amd/iommu.c > @@ -779,11 +779,34 @@ static void dump_command(unsigned long phys_addr) > pr_err("CMD[%d]: %08x\n", i, cmd->data[i]); > } > > +#define AMD_IOMMU_DEVID_SIZE 48 > + > +static void amd_iommu_devid_str(struct amd_iommu *iommu, u16 devid, char *buf, > + size_t size) > +{ > + struct pci_dev *pdev; > + > + pdev = pci_get_domain_bus_and_slot(iommu->pci_seg->id, > + PCI_BUS_NUM(devid), devid & 0xff); > + if (pdev) { > + snprintf(buf, size, "%04x:%02x:%02x.%x %04x:%04x", > + iommu->pci_seg->id, PCI_BUS_NUM(devid), > + PCI_SLOT(devid), PCI_FUNC(devid), > + pdev->vendor, pdev->device); > + pci_dev_put(pdev); >From a quick glance it looks like we call this in bottom halves, which looks fine. > + } else { > + snprintf(buf, size, "%04x:%02x:%02x.%x", > + iommu->pci_seg->id, PCI_BUS_NUM(devid), > + PCI_SLOT(devid), PCI_FUNC(devid)); > + } > +} > + > static void amd_iommu_report_rmp_hw_error(struct amd_iommu *iommu, volatile u32 *event) > { > struct iommu_dev_data *dev_data = NULL; > int devid, vmg_tag, flags; > struct pci_dev *pdev; > + char devid_str[AMD_IOMMU_DEVID_SIZE]; > u64 spa; > > devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; > @@ -796,15 +819,16 @@ static void amd_iommu_report_rmp_hw_error(struct amd_iommu *iommu, volatile u32 > if (pdev) > dev_data = dev_iommu_priv_get(&pdev->dev); > > + amd_iommu_devid_str(iommu, devid, devid_str, sizeof(devid_str)); Will this iterate the global pci dev list for EVERY event? I'm wondering if we could improve that somehow? [------------- >8 ---------------] Thanks, Praan