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Miller" , Donald Hunter , Eric Dumazet , Jakub Kicinski , "Schmidt, Michal" , Paolo Abeni , "Vaananen, Pasi" , "Oros, Petr" , Prathosh Satish , Simon Horman , Vadim Fedorenko , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH net-next v5 1/4] dpll: add DPLL_PIN_TYPE_INT_NCO pin type Message-ID: References: <20260531194423.383366-1-ivecera@redhat.com> <20260531194423.383366-2-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Mon, Jun 08, 2026 at 07:03:46PM +0200, arkadiusz.kubalewski@intel.com wrote: >>From: Ivan Vecera >>Sent: Monday, June 8, 2026 5:48 PM >> >>On 6/8/26 4:43 PM, Kubalewski, Arkadiusz wrote: >>>> From: Ivan Vecera >>>> Sent: Sunday, May 31, 2026 9:44 PM >>>> ... >>>> - >>>> name: gnss >>>> doc: GNSS recovered clock >>>> + - >>>> + name: int-nco >>>> + doc: | >>>> + Device internal numerically controlled oscillator. >>>> + When connected as a DPLL input, the DPLL enters NCO mode >>>> + where the output frequency is adjusted by the host via >>>> + the PTP clock interface. >>> >>> Hi Ivan! >>> >>> How would you control this in case of automatic mode dpll? >>> Automatic mode DPLL shall be controlled on HW level, such pin brakes >>> that rule and requires some driver magic to show it is higher >>> priority then the rest of the pins? >> >>The NCO pin can be connected only in manual mode. In other words a DPLL >>in automatic mode cannot select NCO pin (switch to NCO mode) by its own. >> > >Being picky on DPLL_MODE for enabling feature is not something we can >allow if it is not related to HW limitation, is it? >Could you please elaborate why it is not possible for AUTOMATIC mode? In automatic mode, the pin selection logic is defined upon prio. I can imagine that if NCO pin has the highest prio of the available ones, it gets picked. I would be aligned 100% with automatic mode behaviour. Is there a real usecase for it? [..]