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[104.155.91.135]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4650c114e22sm7285121f8f.34.2026.06.19.06.25.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jun 2026 06:25:03 -0700 (PDT) Date: Fri, 19 Jun 2026 14:24:59 +0100 From: Vincent Donnefort To: Fuad Tabba Cc: Marc Zyngier , Oliver Upton , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Catalin Marinas , Will Deacon , Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Quentin Perret , Sebastian Ene , Hyunwoo Kim Subject: Re: [PATCH v2 1/8] KVM: arm64: Extract MPIDR computation into a shared header Message-ID: References: <20260619070719.812227-1-tabba@google.com> <20260619070719.812227-2-tabba@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260619070719.812227-2-tabba@google.com> On Fri, Jun 19, 2026 at 08:07:12AM +0100, Fuad Tabba wrote: > Extract the vCPU MPIDR computation embedded in reset_mpidr() into a > kvm_calculate_mpidr() inline in sys_regs.h, so it can be computed > without duplicating the logic. A follow-up series reuses it to reset > protected vCPUs at EL2. > > No functional change intended. > > Signed-off-by: Fuad Tabba Reviewed-by: Vincent Donnefort > --- > arch/arm64/kvm/sys_regs.c | 14 +------------- > arch/arm64/kvm/sys_regs.h | 19 +++++++++++++++++++ > 2 files changed, 20 insertions(+), 13 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 33c921df19b5..674fabe1d40d 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -976,21 +976,9 @@ static u64 reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > > static u64 reset_mpidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > { > - u64 mpidr; > + u64 mpidr = kvm_calculate_mpidr(vcpu); > > - /* > - * Map the vcpu_id into the first three affinity level fields of > - * the MPIDR. We limit the number of VCPUs in level 0 due to a > - * limitation to 16 CPUs in that level in the ICC_SGIxR registers > - * of the GICv3 to be able to address each CPU directly when > - * sending IPIs. > - */ > - mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0); > - mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1); > - mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2); > - mpidr |= (1ULL << 31); > vcpu_write_sys_reg(vcpu, mpidr, MPIDR_EL1); > - > return mpidr; > } > > diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h > index 2a983664220c..bd56a45abbf9 100644 > --- a/arch/arm64/kvm/sys_regs.h > +++ b/arch/arm64/kvm/sys_regs.h > @@ -222,6 +222,25 @@ find_reg(const struct sys_reg_params *params, const struct sys_reg_desc table[], > return __inline_bsearch((void *)pval, table, num, sizeof(table[0]), match_sys_reg); > } > > +static inline u64 kvm_calculate_mpidr(const struct kvm_vcpu *vcpu) > +{ > + u64 mpidr; > + > + /* > + * Map the vcpu_id into the first three affinity level fields of > + * the MPIDR. We limit the number of VCPUs in level 0 due to a > + * limitation to 16 CPUs in that level in the ICC_SGIxR registers > + * of the GICv3 to be able to address each CPU directly when > + * sending IPIs. > + */ > + mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0); > + mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1); > + mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2); > + mpidr |= (1ULL << 31); > + > + return mpidr; > +} > + > const struct sys_reg_desc *get_reg_by_id(u64 id, > const struct sys_reg_desc table[], > unsigned int num); > -- > 2.55.0.rc0.738.g0c8ab3ebcc-goog >