From: Nicolin Chen <nicolinc@nvidia.com>
To: Breno Leitao <leitao@debian.org>
Cc: Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
"Joerg Roedel (AMD)" <joro@8bytes.org>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, <rmikey@meta.com>,
<rneu@meta.com>, <kernel-team@meta.com>
Subject: Re: [PATCH] iommu/arm-smmu-v3: Disable PRI when no priq IRQ is available
Date: Mon, 22 Jun 2026 13:51:24 -0700 [thread overview]
Message-ID: <ajmgTMrCUGqnBLiI@nvidia.com> (raw)
In-Reply-To: <20260622-smmu_pri-v1-1-14ad92b6043f@debian.org>
On Mon, Jun 22, 2026 at 09:17:03AM -0700, Breno Leitao wrote:
> When platform firmware advertises an SMMU as PRI-capable in IDR0.PRI
> but does not assign a GSIV for its priq, arm_smmu_setup_unique_irqs()
> warns and continues. ARM_SMMU_FEAT_PRI remains set, so the driver
> still allocates the PRI queue, programs PRIQ_BASE/PROD/CONS, enables
> IRQ_CTRL_PRIQ_IRQEN, and lets IOMMU_DEV_FEAT_IOPF be advertised to
> upper layers. Page Request messages from devices land in a queue no
> one drains, and SVA binds appear to succeed while silently dropping
> every page fault.
>
> Clear ARM_SMMU_FEAT_PRI in the missing-IRQ path so every PRI-gated
> site in the driver consistently treats the SMMU as PRI-less, instead of
> the half-baked stated.
>
> Signed-off-by: Breno Leitao <leitao@debian.org>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index a10affb483a4f..44bafbb38e242 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -4659,7 +4659,8 @@ static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu)
> dev_warn(smmu->dev,
> "failed to enable priq irq\n");
> } else {
> - dev_warn(smmu->dev, "no priq irq - PRI will be broken\n");
> + dev_warn(smmu->dev, "no priq irq - disabling PRI\n");
> + smmu->features &= ~ARM_SMMU_FEAT_PRI;
This is covered by PATCH-7 in my PRI series:
https://lore.kernel.org/linux-iommu/cover.1779944354.git.nicolinc@nvidia.com/
FWIW, changing arm_smmu_setup_unique_irqs() alone isn't complete,
as Sashiko pointed it out:
https://sashiko.dev/#/patchset/20260622-smmu_pri-v1-1-14ad92b6043f%40debian.org
Nicolin
prev parent reply other threads:[~2026-06-22 20:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-22 16:17 [PATCH] iommu/arm-smmu-v3: Disable PRI when no priq IRQ is available Breno Leitao
2026-06-22 20:51 ` Nicolin Chen [this message]
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