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From: Richard Cheng <icheng@nvidia.com>
To: Alison Schofield <alison.schofield@intel.com>
Cc: dave@stgolabs.net, jonathan.cameron@huawei.com,
	dave.jiang@intel.com,  vishal.l.verma@intel.com,
	ira.weiny@intel.com, dan.j.williams@intel.com,
	 linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
	newtonl@nvidia.com,  kristinc@nvidia.com, kaihengf@nvidia.com,
	kobak@nvidia.com, vaslot@nvidia.com,  smadhavan@nvidia.com
Subject: Re: [PATCH v4 2/2] tools/testing/cxl: Enable zero sized decoder under hb0
Date: Tue, 23 Jun 2026 15:22:05 +0800	[thread overview]
Message-ID: <ajozhDmPogKi9hb5@MWDK4CY14F> (raw)
In-Reply-To: <ajn5bIu2lSrjqtXv@aschofie-mobl2.lan>

On Mon, Jun 22, 2026 at 08:11:40PM +0800, Alison Schofield wrote:
> On Mon, Jun 22, 2026 at 06:19:00PM +0800, Richard Cheng wrote:
> > On Fri, Jun 12, 2026 at 11:16:00AM +0800, Alison Schofield wrote:
> > > On Sun, Jun 07, 2026 at 04:13:45PM +0800, Richard Cheng wrote:
> > > > The kernel now allows committed HDM decoders of zero size so BIOS can
> > > > burn slots with LOCK; cxl_test needs to exercise that path.
> > > > 
> > > > Add a mock_zero_size_decoders module parameter (default off). When set,
> > > > the special endpoints under host-bridge0 (cxl_mem.0 and cxl_mem.4) commit
> > > > decoders 1 and 2 as zero-size + locked above the decoder[0] auto-region,
> > > > mirrored on the parent switch and host bridge. commit_end then lands on a
> > > > decoder with no DPA resource, exercising the new enumeration and
> > > > poison-by-endpoint paths.
> > > > 
> > > > Gating keeps the default topology, shared by the rest of the cxl suite,
> > > > unchanged.
> > > 
> > > Can you add a unit test case for this?  I think it makes sense in
> > > cxl-topology.sh. Perhaps before or after the work on the default
> > > cxl-test topology, load this new topo up and validate the zero size
> > > decoders are as expected.
> > >
> > 
> > Hi Alison,
> > 
> > No problem for that, but I want to make sure you are talking about
> > adding test in ndctl right?
> > 
> > I'll send v5 within this week, want to make sure they are ready
> > together.
> 
> Yes, I was thinking updates to cxl-topology.sh and now looking more
> at this version, cxl-poison.sh.
> 
> I only suggest appending to cxl-topology.sh because I don't see 
> any other 'work' that you want to do and verify with the zero size
> decoders. If there is more work to be done, than add a dedicated
> unit test.
> 
> The verification for the tail mappings appends nicely in cxl-poison.sh
> but frankly, I did that before I looked at changes suggest for v5.
> So take the appended diff suggestion as possibly useful, but maybe
> out of date:
> 
> diff --git a/test/cxl-poison.sh b/test/cxl-poison.sh
> index 49aa1b68c5c1..b40c896a0903 100644
> --- a/test/cxl-poison.sh
> +++ b/test/cxl-poison.sh
> @@ -361,6 +361,16 @@ if check_min_kver "7.0"; then
>         run_unaligned_poison_test
>  fi
> 
> +# Assert poison in the unmapped DPA tail is still collected when a
> +# committed zero-size decoder sits at port->commit_end.
> +if modinfo cxl_test | grep -q '^parm:.*mock_zero_size_decoders'; then
> +       modprobe -r cxl_test
> +       modprobe cxl_test mock_zero_size_decoders=1
> +
> +       rc=1
> +       test_poison_by_memdev_by_dpa
> +fi
> +
>  check_dmesg "$LINENO"
> 
>  modprobe -r cxl_test
> diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh
> index 170c9caf840b..aee675d3b7fc 100644
> --- a/test/cxl-topology.sh
> +++ b/test/cxl-topology.sh
> @@ -269,10 +269,46 @@ do
>         ((count == 4)) || err "$LINENO"
>  done
> 
> -
>  # validate that the bus can be disabled without issue
>  $CXL disable-bus $root -f
> 
> +# With mock_zero_size_decoders=1 the host-bridge0 endpoints that back the
> +# auto-region commit two extra decoders (ids 1 and 2) above decoder0 as
> +# zero-size and locked, mocking BIOS-burnt slots. Validate that enumeration
> +# does not abort the port and that those slots appear with size 0 and the
> +# hardware LOCK bit set.
> +test_zero_size_decoders()
> +{
> +       local region target_decoder base burnt size locked
> +
> +       region=$("$CXL" list -R | jq -r ".[0].region")
> +       [[ -n "$region" && "$region" != "null" ]] || err "$LINENO"
> +
> +       # Each auto-region target is a special host-bridge0 endpoint. Its
> +       # decoder0 backs the region; decoders 1 and 2 are the burnt slots.
> +       for target_decoder in $("$CXL" list -r "$region" --targets |
> +               jq -r ".[0].mappings[].decoder"); do
> +               [[ "$target_decoder" =~ ^(decoder[0-9]+)\.0$ ]] || err "$LINENO"
> +               base="${BASH_REMATCH[1]}"
> +
> +               for id in 1 2; do
> +                       burnt="/sys/bus/cxl/devices/${base}.${id}"
> +                       [ -d "$burnt" ] || err "$LINENO"
> +                       size=$(cat "$burnt/size")
> +                       locked=$(cat "$burnt/locked")
> +                       ((size == 0)) || err "$LINENO"
> +                       ((locked == 1)) || err "$LINENO"
> +               done
> +       done
> +}
> +
> +if modinfo cxl_test | grep -q '^parm:.*mock_zero_size_decoders'; then
> +       modprobe -r cxl_test
> +       modprobe cxl_test mock_zero_size_decoders=1
> +
> +       test_zero_size_decoders
> +fi
> +
>  check_dmesg "$LINENO"
> 
>  modprobe -r cxl_test
>

Hi Alison,

Appreciate for these, it really helps alot.
I'll start to work on it, at the same time I'll send v5 before tomorrow for review first.

Best regards,
Richard Cheng.
 
> > 
> > Best regards,
> > Richard Cheng. 

  reply	other threads:[~2026-06-23  7:22 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-07  8:13 [PATCH v4 0/2] Support zero-sized HDM decoders Richard Cheng
2026-06-07  8:13 ` [PATCH v4 1/2] cxl/hdm: Allow zero sized " Richard Cheng
2026-06-07  8:13 ` [PATCH v4 2/2] tools/testing/cxl: Enable zero sized decoder under hb0 Richard Cheng
2026-06-12 18:16   ` Alison Schofield
2026-06-22 10:19     ` Richard Cheng
2026-06-23  3:11       ` Alison Schofield
2026-06-23  7:22         ` Richard Cheng [this message]
2026-06-09 23:13 ` [PATCH v4 0/2] Support zero-sized HDM decoders Dan Williams (nvidia)
2026-06-09 23:37   ` Dan Williams (nvidia)
2026-06-11 10:13     ` Richard Cheng
2026-06-23 17:01   ` Gregory Price

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