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AHgh+Ro9GUErHStxYLn7VtkuZkOzj/9paj5aPIh1O1ylqPnmglIIWadvzDQnQlOpQnuWUG6/C1djIGTBtHLQjvc=@vger.kernel.org X-Gm-Message-State: AOJu0YzHBYu60vtAUhfowuGX4q4Pgio0FU9roqhLg9xjCizkkrQv8eJq ectzflE1KBi0Ena099sKAmtfAcNiS3vbi9bNYKg3t5qsRmKTFnWW9X9mIms2GcQaGTxqtruFvQB GhAr8VA== X-Received: from pgbfm1.prod.google.com ([2002:a05:6a02:4981:b0:c96:4086:38b5]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:3d0b:b0:3b3:f46:1efa with SMTP id adf61e73a8af0-3c0bd0fa172mr9218633637.42.1783606121082; Thu, 09 Jul 2026 07:08:41 -0700 (PDT) Date: Thu, 9 Jul 2026 07:08:40 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260629125205.52394-1-zhang_wei@open-hieco.net> <0e576fd8d8cd2ed1739cee36eba393fea7745506.camel@redhat.com> Message-ID: Subject: Re: [PATCH 0/2] KVM: nSVM: Expose DecodeAssists to L1 From: Sean Christopherson To: Venkatesh Srinivas Cc: Jim Mattson , Tina Zhang , mlevitsk@redhat.com, Paolo Bonzini , kvm@vger.kernel.org, Shuah Khan , zhouyanjing@hygon.cn, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Wed, Jul 08, 2026, Venkatesh Srinivas wrote: > On Mon, Jul 6, 2026 at 6:34=E2=80=AFPM Jim Mattson = wrote: > > > > On Mon, Jul 6, 2026 at 5:02=E2=80=AFPM Tina Zhang wrote: > > > > > I will take another look for the next version and try to handle the > > > remaining pieces properly, while also making sure we don't expose sta= le > > > or incorrectly synthesized decode-assist state for emulated exits. > > > > Naples erratum 1096 seems to imply that the instruction bytes stored > > in the VMCB are not necessarily the same instruction bytes that were > > fetched and decoded to lead to the #PF/#NPF. Hence, in the case of > > emulation, it might be sufficient to read the instruction bytes quite > > late in nested_svm_vmexit(). That would certainly simplify the > > plumbing. >=20 > Would not passing through this feature when erratum 1096 is present > simplify this? I don't think so? I'd be fine with KVM propagating the erratum to the gues= t, i.e. not trying to fixup the decode-assist information if hardware failed t= o provide it. Jim mentioned the erratum because the only way for the erratum to exist is = if hardware re-reads memory after the initial fetch, and so exactly how and wh= en hardware/KVM reads the bytes is a micro-architectural detail. I.e. the mer= e existence of the erratum simplifies KVM's implementation, because we don't = have to strictly read and propagate the entire 15 bytes from KVM's equilavent of= the fetch phase.