From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E88B238D for ; Tue, 30 Jun 2026 08:46:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782809204; cv=none; b=KVudw2G35dTIgFCAdTjcjqGQxLne4QmkE0aTeeyvpbCtlEswwmD9nw5sKcxakEDhEKaYgBIS1Yam2wIiWU5toXmAgKxM+xHDOaoEK/vLsh/DALO/c+93aOSRos1Z3GtCv6mvqgZD4FzgIOW2MGTnZ5cxttmHofwTYSMSAZDukRQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782809204; c=relaxed/simple; bh=fWhGWkg1sVC+Zopw1ah/LLgRFnq+PnpA3zeYqg1SVDo=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=fWAXFrTmkBdOXY33/5eEcrHnkpJYsMfGQnhbGvgoMzKKZ+6vcY7nwudOh4kxmBcQ1/vrGZYtTSRrURUL2t+P2JN71q9FDz0pywMnWqQrTqYLdFyqtECvy03Cp2b/p0hh4TuNlhOC7FUvUWtvu3ftnhFGblgT6o5a5zoebsZdSFs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dCnbgDJw; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dCnbgDJw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1782809203; x=1814345203; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=fWhGWkg1sVC+Zopw1ah/LLgRFnq+PnpA3zeYqg1SVDo=; b=dCnbgDJwOofH0T8PwMO2PNH9xdvxxxwbNo1YJTNmRgv89S1hp+eTbAQ2 tAKurWWMG5PKl8Iyxc0OPTZ27nDd1ARHuUgE1T789JZ+GwpsBWQA/jKHu yA2+OVe08pRVZJgxeoGzEA/rHnbuT6EKCgzV1FnHekbQ2Fw75sj2asIaP Q3v3PKT9UHy+TfCVg67LpjyplhkzpOgpR/dDrsFkIlvPEM3EZOcIGAPpp lNWIcHIL51+uZwcMKGwweBbjXo8AaPuwK/TWdzzEyRDLAzJbB59psotMC 9IatrqoE5yXP2dEIPb83T6CB+zl1iuvM4HpTVX1EfOJnOAZmED2tZL0mP A==; X-CSE-ConnectionGUID: SmILuxxYRjCEaaj16yqt7A== X-CSE-MsgGUID: dTYRZNB8T1uyR1w5ZFBKHw== X-IronPort-AV: E=McAfee;i="6800,10657,11832"; a="83651071" X-IronPort-AV: E=Sophos;i="6.24,233,1774335600"; d="scan'208";a="83651071" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2026 01:46:42 -0700 X-CSE-ConnectionGUID: +X9lGev+TKiS7ZuuBWMq9Q== X-CSE-MsgGUID: WjPREsZyTKSgs5LuE5kwEQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,233,1774335600"; d="scan'208";a="251799766" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa008.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2026 01:46:39 -0700 Date: Tue, 30 Jun 2026 10:46:36 +0200 From: Raag Jadav To: Heikki Krogerus Cc: Rodrigo Vivi , Matthew Brost , Thomas =?iso-8859-1?Q?Hellstr=F6m?= , "Michael J . Ruhl" , Andy Shevchenko , Mika Westerberg , Riana Tauro , David Airlie , Simona Vetter , Andi Shyti , dri-devel@lists.freedesktop.org, intel-xe@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 3/3] drm/xe/mcu_i2c: Take over control of the controller enabling Message-ID: References: <20260625125939.429078-1-heikki.krogerus@linux.intel.com> <20260625125939.429078-4-heikki.krogerus@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260625125939.429078-4-heikki.krogerus@linux.intel.com> On Thu, Jun 25, 2026 at 02:59:39PM +0200, Heikki Krogerus wrote: > Some platforms make an assumption that the i2c controller's > enabled state indicates also the power state of the > controller. This can create a problem when the controller is > in disabled state, because the hardware may assume > incorrectly that it is then also in low-power state. > > To fix this, the controller is kept enabled by taking over > the IC_ENABLE register. The controller has to be disabled > when the configuration is updated and when the target > address or the slave address are assigned, so disabling it > when IC_CON, IC_TAR or IC_SAR registers are programmed, and > then re-enabling it again. I don't have enough context here, so I'll leave this one to the maintainers. Raag