From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D838B35F193 for ; Sun, 5 Jul 2026 08:17:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783239461; cv=none; b=o1UvOepGBBzsz2CcYgJgb7H6RjoWpxgo5r5mT2rBdHnq/Kp34fGHhEW2YWRH1FtA0yhg4W2toTragqnTuLZgrX27tEHaod//EnybDJvEET1zwYpeHgs2jOz6oqkG8ZUL0FNhvfyTTabZpYjYnnKoJXsKJWMJRXd8sbhBejdHr0s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783239461; c=relaxed/simple; bh=N7hDQS0LuCCtBXwG97gDAXf0BPTI4Yjg7umsR9AKEK0=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=oWefYJ/+C+M1pwbVS+51brtdgdaOmNNa8yNC9Q+wJ+ka1pZd0BWftKevQtU354j4x0fCXjPPlWLzCRml5O37WoOwWmrXe2nYJQqh8HQsWyG5Z5PGtbuStmEWAruMwpvKJs5X6e9R3rQjUtCPbcxeG6TkpPDR4YjF0fEQBX76K1c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oQsaZ3YD; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oQsaZ3YD" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 206C51F000E9; Sun, 5 Jul 2026 08:17:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783239460; bh=/04X2Ey2/M6LyDePO/8Eftj2DL6/eufSlIknuyyCtc8=; h=Date:From:To:Cc:Subject; b=oQsaZ3YDvnuPT3dvfEQMa75gpUXFkSOLy+Sko4a6iw1sIHHfSUEM+EeUFkZD9+nCc ZED+D5XcMrJhWTj9d7xjvzmS/XeAz0OLTEFyXPNmhmdq6t1tV09bXnhYGGGUkNEees FpHBylORKBYY01cxjnSAbX17RM6pMRkgCGriFHeW7KGqC9C2S2IgbhS3DVAP3hSh6R 8UDwdRYugsJjbdg3V0B9t4o5LrN5EgXFFquoJMGrR4WZ8ZogjUl73h2TsD4B4jchXI 6WAPf3Tn4uTKFBMK/4jGJHs6s5k3cfhubWosX0MGvSnaj0uSnIwsut7sGdPcHjDhVq Bjd/NDomrujJA== Date: Sun, 5 Jul 2026 10:17:36 +0200 From: Ingo Molnar To: Linus Torvalds Cc: linux-kernel@vger.kernel.org, the arch/x86 maintainers , Peter Zijlstra , "H. Peter Anvin" Subject: [GIT PULL] x86 fix Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Linus, Please pull the latest x86/urgent Git tree from: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-2026-07-05 for you to fetch changes up to fc16126cc11d9f507130bf84ab137ee0938c900e: - Prevent OOB access in the resctrl code while offlining CPUs when Intel SNC (Sub-NUMA Clustering) is enabled (Reinette Chatre) Signed-off-by: Ingo Molnar Thanks, Ingo ------------------> Reinette Chatre (1): x86,fs/resctrl: Prevent out-of-bounds access while offlining CPU when SNC enabled arch/x86/kernel/cpu/resctrl/monitor.c | 5 +++++ fs/resctrl/monitor.c | 39 ++++++++++++++++++++--------------- 2 files changed, 27 insertions(+), 17 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 03ee6102ab07..569894d6e5c8 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -259,6 +259,11 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, if (!domain_header_is_valid(hdr, RESCTRL_MON_DOMAIN, RDT_RESOURCE_L3)) return -EINVAL; + if (cpumask_empty(&hdr->cpu_mask)) { + pr_warn_once("Domain %d has no CPUs\n", hdr->id); + return -EINVAL; + } + d = container_of(hdr, struct rdt_l3_mon_domain, hdr); hw_dom = resctrl_to_arch_mon_dom(d); cpu = cpumask_any(&hdr->cpu_mask); diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c index 0e6a389a16bf..a932a1fea818 100644 --- a/fs/resctrl/monitor.c +++ b/fs/resctrl/monitor.c @@ -135,10 +135,10 @@ void __check_limbo(struct rdt_l3_mon_domain *d, bool force_free) struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_L3); u32 idx_limit = resctrl_arch_system_num_rmid_idx(); struct rmid_entry *entry; + bool rmid_dirty = true; u32 idx, cur_idx = 1; void *arch_mon_ctx; void *arch_priv; - bool rmid_dirty; u64 val = 0; arch_priv = mon_event_all[QOS_L3_OCCUP_EVENT_ID].arch_priv; @@ -161,22 +161,27 @@ void __check_limbo(struct rdt_l3_mon_domain *d, bool force_free) break; entry = __rmid_entry(idx); - if (resctrl_arch_rmid_read(r, &d->hdr, entry->closid, entry->rmid, - QOS_L3_OCCUP_EVENT_ID, arch_priv, &val, - arch_mon_ctx)) { - rmid_dirty = true; - } else { - rmid_dirty = (val >= resctrl_rmid_realloc_threshold); - - /* - * x86's CLOSID and RMID are independent numbers, so the entry's - * CLOSID is an empty CLOSID (X86_RESCTRL_EMPTY_CLOSID). On Arm the - * RMID (PMG) extends the CLOSID (PARTID) space with bits that aren't - * used to select the configuration. It is thus necessary to track both - * CLOSID and RMID because there may be dependencies between them - * on some architectures. - */ - trace_mon_llc_occupancy_limbo(entry->closid, entry->rmid, d->hdr.id, val); + if (!force_free) { + if (resctrl_arch_rmid_read(r, &d->hdr, entry->closid, + entry->rmid, QOS_L3_OCCUP_EVENT_ID, + arch_priv, &val, arch_mon_ctx)) { + rmid_dirty = true; + } else { + rmid_dirty = (val >= resctrl_rmid_realloc_threshold); + + /* + * x86's CLOSID and RMID are independent numbers, + * so the entry's CLOSID is an empty CLOSID + * (X86_RESCTRL_EMPTY_CLOSID). On Arm the RMID + * (PMG) extends the CLOSID (PARTID) space with + * bits that aren't used to select the configuration. + * It is thus necessary to track both CLOSID and + * RMID because there may be dependencies between + * them on some architectures. + */ + trace_mon_llc_occupancy_limbo(entry->closid, entry->rmid, + d->hdr.id, val); + } } if (force_free || !rmid_dirty) {