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[34.168.149.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8482b333d4fsm262662b3a.54.2026.07.06.14.16.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jul 2026 14:16:41 -0700 (PDT) Date: Mon, 6 Jul 2026 21:16:38 +0000 From: David Matlack To: Josh Hilke Cc: Alex Williamson , Vipin Sharma , Shuah Khan , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Alex Williamson Subject: Re: [PATCH v2 09/10] selftests/vfio: igb: Recover after DMA-read faults Message-ID: References: <20260526235417.2058313-1-jrhilke@google.com> <20260526235417.2058313-10-jrhilke@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260526235417.2058313-10-jrhilke@google.com> On 2026-05-26 11:54 PM, Josh Hilke wrote: > From: Alex Williamson > > The mix_and_match test intentionally submits a TX descriptor with an > unmapped source IOVA so that the DMA read fails. On real 82576 > hardware the resulting fault leaves the descriptor engine unable to > service subsequent valid descriptors, so the next memcpy in the same > test iteration times out. > > The 82576 datasheet (section 4.2.1.6.1) describes CTRL.RST as the > software mechanism to recover from a hung device. Empirically > CTRL.RST alone is not sufficient in this state: the visible queue > registers are reinitialized, but the next valid memcpy still posts > descriptors without any TDH/TDT progress in the same process. A > fresh device open after the failure works, which points to a reset > scope broader than CTRL.RST being required. The 82576 advertises > PCIe FLR; VFIO_DEVICE_RESET drives FLR and supplies that scope while > preserving the selftest process and its DMA mappings. > > Add igb_error_reset_and_reinit() implementing the recovery sequence: > issue VFIO_DEVICE_RESET, re-arm the kernel-side MSI-X trigger against > the still-valid eventfd via vfio_pci_irq_reenable() (this does not > touch the eventfd, which test fixtures may have cached), and > re-program the device via igb_hw_init(). FLR clears EICR and leaves > EIMS=0, so no explicit interrupt mask or cause writes are needed. > igb_hw_init() resets tx_tail/rx_tail to 0 and igb_memcpy_start() zeros > each descriptor before submission, so no ring memset is needed either. > > Call this from igb_memcpy_wait() on completion timeout, preceded by a > 10 ms delay so that PCIe/IOMMU/AER error handling triggered by the > just-observed DMA fault can release the device lock VFIO_DEVICE_RESET > contends for. The delay is heuristic and tied to the fault path, so > it lives at the call site rather than inside the reset helper. The > failed memcpy still returns -ETIMEDOUT; reset recovery only ensures > the next operation starts from a usable device state. > > Assisted-by: Claude:claude-opus-4-7 > Signed-off-by: Alex Williamson Reviewed-by: David Matlack