From: Akash Sukhavasi <akash.sukhavasi@gmail.com>
To: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>
Cc: linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] phy: HiSilicon: Fix error handling in hi3670_pcie_allclk_ctrl()
Date: Mon, 20 Jul 2026 20:47:33 -0500 [thread overview]
Message-ID: <al7LfrvG_8P9NpFv@gmail.com> (raw)
In-Reply-To: <20260708-b4-hi3670-v1-1-f9236f3e585c@gmail.com>
On Wed, Jul 08, 2026 at 04:31:00PM -0500, Akash Sukhavasi wrote:
> When hi3670_pcie_pll_ctrl() fails, hi3670_pcie_allclk_ctrl() returns
> -EINVAL directly, skipping the close_clocks cleanup path. This leaves
> the PLL with its power-down bit cleared.
Friendly ping on this one. Patch still applies cleanly on
phy/linux-phy.git next.
--
Thanks,
Akash
prev parent reply other threads:[~2026-07-21 1:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 21:31 [PATCH] phy: HiSilicon: Fix error handling in hi3670_pcie_allclk_ctrl() Akash Sukhavasi
2026-07-21 1:47 ` Akash Sukhavasi [this message]
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