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Fri, 10 Jul 2026 17:01:36 +0000 Date: Fri, 10 Jul 2026 10:01:34 -0700 From: "Luck, Tony" To: Reinette Chatre CC: Fenghua Yu , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , "Drew Fustini" , Dave Martin , Chen Yu , David E Box , , Christoph Hellwig , , Subject: Re: [PATCH v9 01/12] platform/x86/intel/{pmt,vsec}: Prevent unbind via sysfs Message-ID: References: <20260701213553.15222-1-tony.luck@intel.com> <20260701213553.15222-2-tony.luck@intel.com> <8c627385-b6d4-469d-bf99-b1cdf606bccc@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: SJ0PR13CA0027.namprd13.prod.outlook.com (2603:10b6:a03:2c0::32) To SJ1PR11MB6083.namprd11.prod.outlook.com (2603:10b6:a03:48a::9) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR11MB6083:EE_|CH3PR11MB8444:EE_ X-MS-Office365-Filtering-Correlation-Id: df94fe1e-6576-4579-3f95-08dedea4e70e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|366016|7416014|1800799024|18002099003|22082099003|56012099006|11063799006|4143699003|5023799004; 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It is not clear to me that there would be > > a page fault though. I looked around at what other drivers do and it seems that > > readq() may return all 1s in this scenario? Consider for example, how > > IXGBE_FAILED_READ_REG, PCI_ERROR_RESPONSE (note the comments above its definition), > > and PCI_POSSIBLE_ERROR are used. Some drivers just straight compare against -1 like > > the "if (readl(dev->bar + NVME_REG_CSTS) == -1)" in nvme_pci_enable(). > > There is also this related snippet in Documentation/PCI/pci.rst: "Most x86 platforms > > will allow MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage > > (e.g. ~0)." Handling ~0 may be even simpler? > > The return of all 1s happens in the case that the underlying h/w has gone, > so the PCIe request to read the data is aborted. That's not what happens > here. When Linux uses ioremap() to set up a virtual address to access an > MMIO range the virtual address is allocated from the same virtual space > that vmalloc() uses. When that range is iounmap()'d the page tables are > invalidated. So any subsequent access gets a page fault (confirmed by my test). > > But ... I ran my patch past an AI review and it pointed out the flaw. The old > virtual address may be reallocated by a subsequent ioremap() or vmalloc() > call, at which point AET would begin accessing whatever memory/device was > now mapped to the virtual address. New scheme. Change intel_pmt_get_regions_by_feature() enumeration to pass the physical address of the MMIO region instead of the virtual address mapping created by intel_pmt_dev_register(). Then intel_aet.c can use ioremap() to create an independent virtual mapping to the AET register region in MMIO space. Then it doesn't matter if some unbind or remove operation tears down the virtual mapping. Resctrl can keep accessing the MMIO registers. The MMIO space is "on package", so can't be physically removed in a hot plug operation. The PCIe device could be disabled, but that would only result in the 0xfffffffffffffff return value when trying to read the registers. There's a flaw in every approach. The problem in this one is if Linux reprograms the PCIe device BAR registers to move to a different physical address, resctrl would be left using mappings to a stale physical address. I don't know how to judge if this is a real problem on production servers. > > > > > Reinette > > -Tony -Tony