From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4D2D23394D; Sun, 12 Jul 2026 14:55:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783868131; cv=none; b=h6st2sSUkCxug1A/daN4P81tCLiDpQ0ltAbPV2LW8TBDTMPOsEas+KX2tMzKhOmPAFQXV7hwBAq0xJ8aMneSMTqkdKoqFe6XVfjJCXGqCW55EikFIefRguU2Z6QF5Byj/Khn/E7jspKtWiUK6JjsoS36eBnS9dvj1d4//c1vkvY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783868131; c=relaxed/simple; bh=Ac6ZfTgAaHGS71xHfdF9njHRKJ5mB29c9Dhsw2bx61U=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=VGwEGoM4fpaUHqRrQu3KCtMmrIntIaXX072HL/0zIdF/W9C0jqDMVySg1YM8V6EQifFAen6oG/Pxcd8WfuvQiEAhy7JkPHJ60anFi9UyYtkDbZdAPYrHnTNfhVL7MBjtcfbZ+EhPXvK20jEZwub+IcAgiLZOU4mX3JJyAF0ZnlY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=md92YJic; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="md92YJic" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 927E31F000E9; Sun, 12 Jul 2026 14:55:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783868129; bh=ZFzBN2QN2rCkml+dqde4dT6lV+O1vjvk1z2nt/DOeIE=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=md92YJicisjFyi17HuFz0c0INC5dqJ18bD7LO+mCeoOqzUQtPgfGWzrYk1H0M9D+f BHSMSzC97nXmOpFJQq0rnJqxYYI+jYnuAEd8vC0eDB3buD9edRCfXkO+AiOBx7DD4a piH7XUlnt0sEuB9S5NxZAK/F8ibAqnxFkjUu8lGKWuvxqkyisAp/9uMWDowoxGfaHQ FJfyqWuYqJaCOfREvCrwSl6kFd6UVB4Ylzf6534Tqe/yscaV3eVEFuYKru+M7wCbCP 0BFhA/3pudtHkw+cJ2/g+jBNJgg3zV4o4qnIW4GGeTEP5ZACTd620/uKtUd3b5qG4G tdxexJUso2Bgw== Date: Sun, 12 Jul 2026 09:55:26 -0500 From: Bjorn Andersson To: Atanas Filipov Cc: linux-media@vger.kernel.org, bryan.odonoghue@linaro.org, vladimir.zapolskiy@linaro.org, loic.poulain@oss.qualcomm.com, mchehab@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, konradybcio@kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v4 3/5] dt-bindings: media: qcom: Add JPEG encoder binding Message-ID: References: <20260706071113.383215-1-atanas.filipov@oss.qualcomm.com> <20260706071113.383215-4-atanas.filipov@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260706071113.383215-4-atanas.filipov@oss.qualcomm.com> On Mon, Jul 06, 2026 at 10:11:11AM +0300, Atanas Filipov wrote: > Add device-tree binding for the Qualcomm JPEG encoder hardware block > present in SM8250 (Kona) SoCs. > > The JPEG encoder is a standalone hardware IP within the camera subsystem > that performs JPEG compression in memory-to-memory fashion. It is > separate from the CAMSS ISP pipeline and has its own register space, > interrupt, clocks, power domain, IOMMU streams, and interconnect paths. > > Signed-off-by: Atanas Filipov > --- > .../bindings/media/qcom,jpeg-encoder.yaml | 151 ++++++++++++++++++ > 1 file changed, 151 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml > > diff --git a/Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml > new file mode 100644 > index 000000000000..e4c16388ef07 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml > @@ -0,0 +1,151 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,jpeg-encoder.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm JPEG Encoder > + > +maintainers: > + - Atanas Filipov > + > +description: > + Qualcomm JPEG Encoder is the JPEG encode hardware present in Qualcomm SoCs. > + > +properties: > + compatible: > + enum: > + - qcom,sm8250-jenc I suspect you find it obvious that this is the block than is used to enc the js, but I don't. We have space, can we please use some more letters here? How about inflating this to qcom,sm8250-jpeg-enc? Is there a qcom,sm8250-jdec as well? Is that a completely separate block, or is this IP-block actually the qcom,scm8250-jpeg block doing both encoding and decoding? Regards, Bjorn > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 6 > + > + clock-names: > + items: > + - const: hf_axi > + - const: sf_axi > + - const: core_ahb > + - const: cpas_ahb > + - const: cnoc_axi > + - const: jpeg > + > + interconnects: > + maxItems: 3 > + > + interconnect-names: > + items: > + - const: cpu-cfg > + - const: hf-mnoc > + - const: sf-mnoc > + > + iommus: > + maxItems: 1 > + > + operating-points-v2: true > + > + opp-table: > + type: object > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + - interconnects > + - interconnect-names > + - iommus > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + #include > + #include > + > + jpeg-encoder@ac53000 { > + compatible = "qcom,sm8250-jenc"; > + reg = <0xac53000 0x1000>; > + > + interrupts = ; > + > + clocks = <&gcc GCC_CAMERA_HF_AXI_CLK>, > + <&gcc GCC_CAMERA_SF_AXI_CLK>, > + <&camcc CAM_CC_CORE_AHB_CLK>, > + <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CAMNOC_AXI_CLK>, > + <&camcc CAM_CC_JPEG_CLK>; > + clock-names = "hf_axi", > + "sf_axi", > + "core_ahb", > + "cpas_ahb", > + "cnoc_axi", > + "jpeg"; > + > + interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "cpu-cfg", > + "hf-mnoc", > + "sf-mnoc"; > + > + iommus = <&apps_smmu 0x2040 0x400>; > + > + operating-points-v2 = <&jpeg_opp_table>; > + > + jpeg_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-100000000 { > + opp-hz = /bits/ 64 <400000000>, > + /bits/ 64 <100000000>; > + opp-peak-kBps = <76800 104166 104166>; > + opp-avg-kBps = <38400 33569 33569>; > + required-opps = <&rpmhpd_opp_min_svs>; > + }; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <400000000>, > + /bits/ 64 <200000000>; > + opp-peak-kBps = <76800 208333 208333>; > + opp-avg-kBps = <38400 67138 67138>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-400000000 { > + opp-hz = /bits/ 64 <400000000>, > + /bits/ 64 <400000000>; > + opp-peak-kBps = <76800 416666 416666>; > + opp-avg-kBps = <38400 134277 134277>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-480000000 { > + opp-hz = /bits/ 64 <400000000>, > + /bits/ 64 <480000000>; > + opp-peak-kBps = <76800 500000 500000>; > + opp-avg-kBps = <38400 161132 161132>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-600000000 { > + opp-hz = /bits/ 64 <400000000>, > + /bits/ 64 <600000000>; > + opp-peak-kBps = <76800 625000 625000>; > + opp-avg-kBps = <38400 201416 201416>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + }; > + }; > -- > 2.34.1 >