From: Frank Li <Frank.li@oss.nxp.com>
To: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Cc: wsa+renesas@sang-engineering.com,
tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com,
Frank.Li@nxp.com, p.zabel@pengutronix.de,
linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH v5 17/17] i3c: renesas: Add runtime PM support
Date: Wed, 15 Jul 2026 12:54:33 -0400 [thread overview]
Message-ID: <ale7SS4VZ8aIwhJ3@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260713130545.568657-18-claudiu.beznea+renesas@tuxon.dev>
On Mon, Jul 13, 2026 at 04:05:45PM +0300, Claudiu Beznea wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> On the SoCs where the Renesas I3C driver is enabled (RZ/G3S and RZ/G3E),
> the clocks of the IP are managed through a clock PM domain. To keep the
> I3C code simpler, the explicit clock handling was dropped along with the
> addition of runtime PM support, in favor of the runtime PM APIs. Only the
> code for getting tclk was preserved, as it is necessary to compute the
> I3C clock rate.
>
> All the APIs provided to the I3C subsystem through struct
> i3c_master_controller_ops are guarded with runtime PM APIs to
> enable/disable the controller at runtime.
>
> As the Renesas I3C driver implements an asynchronous transmit model by
> preparing a transfer and waiting for its completion through the ISR,
> renesas_i3c_abort_xfer() was added to disable interrupts and clear any
> pending IRQ status bits when there is no completion in the defined
> timeout. Along with this, renesas_i3c_wait_xfer() return type was changed
> to unsigned long.
>
> Add runtime PM support for the Renesas I3C driver.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>
> Changes in v5:
> - updated renesas_i3c_irqs_mask_and_clear() to use the
> renesas_i3c_irqs_mask_and_clear_locked() introduced in patch 1 from
> this series
>
> Changes in v4:
> - renamed renesas_i3c_abort_xfer() from v3 to
> renesas_i3c_irqs_mask_and_clear(); along with it renamed local varibles
> abort_xfer to xfer_failed
>
> Changes in v3:
> - dropped the RPM resume/suspend in renesas_i3c_suspend() to read the
> DATBASn registers as the DATBASn register are not used on suspend/resume
> path anymore in this version
>
> Changes in v2:
> - dropped the runtime suspend/resume functions as for now, there will be
> no pinctrl sleep state described in DT
> - do not synchronize the IRQs in renesas_i3c_abort_xfer() as some handlers
> may re-enable interrupts; instead just disable the interrupts and clean
> any status bits that the IRQ handlers are touching; with this the
> struct renesas_i3c::{irqs, num_irqs} and the associated code was removed
> - dropped the renesas_i3c_dont_use_autosuspend() along with the
> devm_add_action_or_reset() call to set it since the same operation is
> done by the devres cleanup helper of devm_pm_runtime_enable()
> - adjusted the renesas_i3c_suspend() with RPM calls to save the DATBAS
> registers
> - use pm_runtime_resume_and_get() in renesas_i3c_resume() to avoid
> mixing gotos with cleanup helpers
> - adjusted the patch description to reflect these changes
>
...
>
> @@ -1384,12 +1458,16 @@ static int renesas_i3c_probe(struct platform_device *pdev)
> if (IS_ERR(i3c->regs))
> return PTR_ERR(i3c->regs);
>
> - ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &i3c->clks);
> - if (ret <= RENESAS_I3C_TCLK_IDX)
> - return dev_err_probe(&pdev->dev, ret < 0 ? ret : -EINVAL,
> - "Failed to get clocks (need > %d, got %d)\n",
> - RENESAS_I3C_TCLK_IDX, ret);
> - i3c->num_clks = ret;
> + i3c->tclk = devm_clk_get(&pdev->dev, "tclk");
only one tclk? you remove devm_clk_bulk_get_all_enabled()
Frank
next prev parent reply other threads:[~2026-07-15 16:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 13:05 [PATCH v5 00/17] i3c: renesas: Suspend to RAM with power loss and runtime PM Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 01/17] i3c: renesas: Check that the transfer is valid before accessing it Claudiu Beznea
2026-07-13 16:51 ` Frank Li
2026-07-13 13:05 ` [PATCH v5 02/17] i3c: renesas: Restore STDBR and EXTBR registers on resume Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 03/17] i3c: renesas: Follow the reset deassert order used in probe Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 04/17] i3c: renesas: Reconfigure the DATBAS register on re-attach Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 05/17] i3c: renesas: Reset the controller on resume Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 06/17] i3c: renesas: Perform Dynamic Address Assignment " Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 07/17] i3c: renesas: Clean DATBAS register on detach Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 08/17] i3c: renesas: Fix out-of-bounds access for newdevs mask Claudiu Beznea
2026-07-13 17:01 ` Frank Li
2026-07-13 13:05 ` [PATCH v5 09/17] i3c: renesas: Use reset_control_bulk_{assert, deassert}() Claudiu Beznea
2026-07-13 17:02 ` Frank Li
2026-07-13 13:05 ` [PATCH v5 10/17] i3c: renesas: Return immediately if there is no transfer Claudiu Beznea
2026-07-15 16:48 ` Frank Li
2026-07-13 13:05 ` [PATCH v5 11/17] i3c: renesas: Follow a unified pattern for transfer and command initialization Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 12/17] i3c: renesas: Drop the explicit memset() call Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 13/17] i3c: renesas: Update HW registers after SW computations are done Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 14/17] i3c: renesas: Organize structures to avoid unnecessary padding Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 15/17] i3c: renesas: Use the "dev_name:irq_name" format for the interrupt name Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 16/17] i3c: renesas: Drop unnecessary tab Claudiu Beznea
2026-07-13 13:05 ` [PATCH v5 17/17] i3c: renesas: Add runtime PM support Claudiu Beznea
2026-07-15 16:54 ` Frank Li [this message]
2026-07-16 9:33 ` Claudiu Beznea
2026-07-13 17:26 ` [PATCH v5 00/17] i3c: renesas: Suspend to RAM with power loss and runtime PM Tommaso Merciai
2026-07-20 16:58 ` Alexandre Belloni
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