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Date: Mon, 16 Jan 2017 17:16:21 +0100 (CET)
From: Thomas Gleixner <tglx@linutronix.de>
To: Peter Zijlstra <peterz@infradead.org>
cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>,
        vikas.shivappa@intel.com, linux-kernel@vger.kernel.org, x86@kernel.org,
        hpa@zytor.com, mingo@kernel.org, ravi.v.shankar@intel.com,
        tony.luck@intel.com, fenghua.yu@intel.com, h.peter.anvin@intel.com
Subject: Re: [PATCH 4/8] x86/intel_rdt/mba: Memory b/w allocation feature
 detect
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On Mon, 16 Jan 2017, Peter Zijlstra wrote:

> On Mon, Jan 16, 2017 at 02:59:11PM +0100, Thomas Gleixner wrote:
> > On Tue, 10 Jan 2017, Vikas Shivappa wrote:
> > 
> > > Detect MBA feature if CPUID.(EAX=10H, ECX=0):EBX.L2[bit 3] = 1.
> > > Add supporting data structures to detect feature details which is done
> > > in later patch using CPUID with EAX=10H, ECX= 3.
> > 
> > So why is the $subject of this patch claiming that it provides the feature
> > detection?
> > 
> > > -/* CPUID.(EAX=10H, ECX=ResID=1).EDX */
> > > +/* CPUID.(EAX=10H, ECX=ResID=3).EAX */
> > > +union cpuid_0x10_3_eax {
> > > +	struct {
> > > +		unsigned int max_delay:12;
> > > +	} split;
> > 
> > And the point of this struct is?
> 
> I suppose its there so we cannot forget adding it when we add more
> bitfields in that word and to keep naming (full vs split) consistent wrt
> other cpuid unions that do have multiple fields.

Fair enough.