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Date: Wed, 18 Jan 2017 10:01:37 +0100 (CET)
From: Thomas Gleixner <tglx@linutronix.de>
To: Shivappa Vikas <vikas.shivappa@intel.com>
cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>,
        linux-kernel@vger.kernel.org, x86@kernel.org, hpa@zytor.com,
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Subject: Re: [PATCH 1/8] Documentation, x86: Documentation for Intel Mem b/w
 allocation user interface
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On Tue, 17 Jan 2017, Shivappa Vikas wrote:
> On Mon, 16 Jan 2017, Thomas Gleixner wrote:
> > This interface is really crap. The natural way to express it is:
> > 
> >     Requested Bandwidth = X %
> 
> I wanted to do it this way which did seem more intuitive but the issue is with
> the non-linear scale which the hardware does not guarantee a particular
> percentage for a particular value. Or we don't know the curve for delay value
> vs. actual b/w throttled.
> 
> ex: in non linear scale , the granularity is 2^n.
> Max : 512
> 
> Say a value of 256 is not guaranteed to have 50% or even follow a curve where
> we can calculate the corresponding percentage.

The question is whether this non linear scale thing is just a first
implementation attempt and any sane hardware in the future will use the
percentage value (which is an approximation as well).

If that non-linear scale is not going to be prevalent, then we really can
live with the fallout of a particular CPU type.

If it's going to stay, then Intel should be able to provide simple tables
which give us the required information for a particular CPU model.

Thanks,

	tglx