From: Thomas Gleixner <tglx@linutronix.de>
To: Dou Liyang <douly.fnst@cn.fujitsu.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, mingo@kernel.org,
ebiederm@xmission.com, bhe@redhat.com, hpa@zytor.com,
izumi.taku@jp.fujitsu.com
Subject: Re: [RFC PATCH 0/6] Unify the Interrupt Mode and setup it as soon as possible
Date: Thu, 6 Apr 2017 10:43:01 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.20.1704060955460.1716@nanos> (raw)
In-Reply-To: <1490799333-18242-1-git-send-email-douly.fnst@cn.fujitsu.com>
On Wed, 29 Mar 2017, Dou Liyang wrote:
> The purpose of this patchset is Unifing these setup steps and executing as
> soon as possible as follows:
>
> start_kernel
> ---------------+
> |
> |
> |
> | init_IRQ
> +---->---+----+
> | |
> | | +--------------------+
> | +----> | 4. init_bsp_APIC |
> | +--------------------+
> v
>
> By the way, Also fix a bug about kexec[3].
>
>
> Some doubts, need help:
>
> 1. Patchset has influence on IOMMU in enable_IR_x2apic(). Not sure
> it can be in advance?
That should work.
> 2. Due to
>
> Commit 8c3ba8d04924 ("x86, apic: ack all pending irqs when crashed/on kexec")
>
> ..., patchset also needs TSC and uses the "cpu_khz" in setup_local_APIC().
> And a warning[4] will be triggered when crashed/on kexec. Not sure how to
> modify?
The local APIC timer initialization cannot be run from init_IRQ().
The problem here is that CPU and TSC frequency calibration depends on the
PIT/HPET interrupt (irq 0) working for machines which cannot calibrate via
MSR/CPUID or if fast calibration via PIT fails.
So we need to split that initialization into several parts:
1) Set up the APIC/IOAPIC (including testing whether the timer interrupt
works)
2) Calibrate TSC
3) Set up the local APIC timer
Thanks,
tglx
next prev parent reply other threads:[~2017-04-06 9:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 14:55 [RFC PATCH 0/6] Unify the Interrupt Mode and setup it as soon as possible Dou Liyang
2017-03-29 14:55 ` [RFC PATCH 1/6] x86/apic: Replace init_bsp_APIC() with apic_virture_wire_mode_setup() Dou Liyang
2017-04-05 10:43 ` Thomas Gleixner
2017-04-05 10:50 ` Thomas Gleixner
2017-04-06 1:37 ` Dou Liyang
2017-04-06 1:32 ` Dou Liyang
2017-03-29 14:55 ` [RFC PATCH 2/6] x86/apic: Construct a framework for setuping APIC mode as soon as possible Dou Liyang
2017-04-05 11:46 ` Thomas Gleixner
2017-04-06 2:21 ` Dou Liyang
2017-03-29 14:55 ` [RFC PATCH 3/6] x86/apic: Extract APIC timer related code from apic_bsp_setup() Dou Liyang
2017-04-05 11:56 ` Thomas Gleixner
2017-04-07 7:51 ` Dou Liyang
2017-03-29 14:55 ` [RFC PATCH 4/6] x86/apic: Make the APIC mode setup earlier for SMP-capable system Dou Liyang
2017-03-29 14:55 ` [RFC PATCH 5/6] x86/apic: Make the APIC mode setup earlier for UP system Dou Liyang
2017-03-29 14:55 ` [RFC PATCH 6/6] x86/apic: Remove the apic_virture_wire_mode_setup() Dou Liyang
2017-03-30 2:08 ` [RFC PATCH 0/6] Unify the Interrupt Mode and setup it as soon as possible Baoquan He
2017-03-30 3:03 ` Dou Liyang
2017-03-30 3:09 ` Dou Liyang
2017-03-30 4:10 ` Baoquan He
2017-04-06 8:43 ` Thomas Gleixner [this message]
2017-04-07 9:39 ` Dou Liyang
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