From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751811AbdJ0NvP (ORCPT ); Fri, 27 Oct 2017 09:51:15 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:34551 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751796AbdJ0NvM (ORCPT ); Fri, 27 Oct 2017 09:51:12 -0400 Date: Fri, 27 Oct 2017 15:51:02 +0200 (CEST) From: Thomas Gleixner To: Andy Lutomirski cc: X86 ML , Borislav Petkov , "linux-kernel@vger.kernel.org" , Brian Gerst , Dave Hansen , Linus Torvalds Subject: Re: [PATCH 10/18] x86/asm/32: Pull MSR_IA32_SYSENTER_CS update code out of native_load_sp0() In-Reply-To: <75b2372395f579c20ee6fd53d03eb79c6eea8e81.1509006199.git.luto@kernel.org> Message-ID: References: <75b2372395f579c20ee6fd53d03eb79c6eea8e81.1509006199.git.luto@kernel.org> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 26 Oct 2017, Andy Lutomirski wrote: > diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h > index b390ff76e58f..0167e3e35a57 100644 > --- a/arch/x86/include/asm/processor.h > +++ b/arch/x86/include/asm/processor.h > @@ -520,13 +520,6 @@ static inline void > native_load_sp0(struct tss_struct *tss, struct thread_struct *thread) > { > tss->x86_tss.sp0 = thread->sp0; > -#ifdef CONFIG_X86_32 > - /* Only happens when SEP is enabled, no need to test "SEP"arately: */ > - if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) { > - tss->x86_tss.ss1 = thread->sysenter_cs; > - wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); > - } > -#endif > } > > static inline void native_swapgs(void) > diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h > index fcc5cd387fd1..f3fa19925ae1 100644 > --- a/arch/x86/include/asm/switch_to.h > +++ b/arch/x86/include/asm/switch_to.h > @@ -72,4 +72,15 @@ do { \ > ((last) = __switch_to_asm((prev), (next))); \ > } while (0) > > +#ifdef CONFIG_X86_32 > +static inline void refresh_sysenter_cs(struct thread_struct *thread) > +{ > + /* Only happens when SEP is enabled, no need to test "SEP"arately: */ > + if (unlikely(this_cpu_read(cpu_tss.x86_tss.ss1) == thread->sysenter_cs)) > + return; > + > + this_cpu_write(cpu_tss.x86_tss.ss1, thread->sysenter_cs); You lost the wrmsr() on the way... Ideally you move the code unmodified first and then do the this_cpu_ change on top. Thanks, tglx