Re: Linux 2.6.30-rc8 [also: VIA Support]

Linus Torvalds
2009-06-04T17:03:33Z

On Thu, 4 Jun 2009, Michael S. Zick wrote:
>
> The C7-M processor uses "in-order retirement" not "out-of-order" - -
> I think the MCR's **should not** be set for "weak ordered writes" -

In-order retirement does not really imply anything at all about how write
ordering works out. In most CPU parlance, you'd say that you've "retired"
a write instruction when it has completed in the write queue - but it
would not mean anything in particular for memory ordering.

Of course, I don't think the C7 is just in-order retirement, I think it's
pretty much in-order everything. Usually you only specify that
"retirement" part when there is some out-of-order execution in other parts
of the pipeline, but I think the C7 is entirely in-order pipeline,
although I suspect the FPU side is likely somewhat separated.

But still, with a write buffer (and _no_ sane x86 does not have a write
buffer), that doesn't actually mean that the cache and memory accesses are
necessarily entirely in-order.

That said, how all the internal CPU registers are set is all black magic.

Linus